EZ80190AZ050EG Zilog, EZ80190AZ050EG Datasheet - Page 21

IC WEBSERVER 50MHZ XTEMP 100LQFP

EZ80190AZ050EG

Manufacturer Part Number
EZ80190AZ050EG
Description
IC WEBSERVER 50MHZ XTEMP 100LQFP
Manufacturer
Zilog
Datasheet

Specifications of EZ80190AZ050EG

Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Processor Series
EZ80190x
Core
eZ80
Data Bus Width
8 bit
Program Memory Type
ROMLess
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3865
EZ80190AZ050EG

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Manufacturer
Quantity
Price
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Manufacturer:
Zilog
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EZ80190AZ050EG
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Table 1. 100-Pin LQFP Pin Identification of the eZ80190 Device (Continued)
PS006614-1208
Pin
No.
42
43
44
45
46
47
48
49
Symbol
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
V
GND
DD
Function
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Power Supply
Ground
Signal Direction
Bidirectional,
tristate
Bidirectional,
tristate
Bidirectional,
tristate
Bidirectional,
tristate
Bidirectional,
tristate
Bidirectional,
tristate
Description
The data bus transfers data to and from I/O and
memory devices. The eZ80190 device drives
these lines only during write cycles when the
eZ80190 device is the bus master. The data bus
is configured as an output in normal operation
and as an input during bus acknowledge cycles.
The data bus transfers data to and from I/O and
memory devices. The eZ80190 device drives
these lines only during write cycles when the
eZ80190 device is the bus master. The data bus
is configured as an output in normal operation
and as an input during bus acknowledge cycles.
The data bus transfers data to and from I/O and
memory devices. The eZ80190 device drives
these lines only during write cycles when the
eZ80190 device is the bus master. The data bus
is configured as an output in normal operation
and as an input during bus acknowledge cycles.
The data bus transfers data to and from I/O and
memory devices. The eZ80190 device drives
these lines only during write cycles when the
eZ80190 device is the bus master. The data bus
is configured as an output in normal operation
and as an input during bus acknowledge cycles.
The data bus transfers data to and from I/O and
memory devices. The eZ80190 device drives
these lines only during write cycles when the
eZ80190 device is the bus master. The data bus
is configured as an output in normal operation
and as an input during bus acknowledge cycles.
The data bus transfers data to and from I/O and
memory devices. The eZ80190 device drives
these lines only during write cycles when the
eZ80190 device is the bus master. The data bus
is configured as an output in normal operation
and as an input during bus acknowledge cycles.
Power Supply
Ground
Product Specification
Architectural Overview
11

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