YW80C188EC20 Intel, YW80C188EC20 Datasheet - Page 40

• Manufacturer Part Number: YW80C188EC20
• Description: IC MPU 16-BIT 5V 20MHZ 100-SQFP
• Manufacturer: Intel

Specifications of YW80C188EC20

• Processor Type: 80C188
• Features: EC suffix, 16-Bit, Extended Temp
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-SQFP
• Family Name: Intel186
• Device Core: 8088
• Device Core Size: 16b
• Frequency (max): 20MHz
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: SQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 864139

80C186EC 188EC 80L186EC 188EC
DERATING CURVES
RESET
The processor will perform a reset operation any
time the RESIN pin is active The RESIN pin is syn-
chronized before it is presented internally which
means that the clock must be operating before a
reset can take effect From a power-on state RESIN
must be held active (low) in order to guarantee cor-
rect initialization of the processor Failure to pro-
vide RESIN while the device is powering up will
result in unspecified operation of the device
Figure 16 shows the correct reset sequence when
first applying power to the processor An external
clock connected to CLKIN must not exceed the V
threshold being applied to the processor This is nor-
mally not a problem if the clock driver is supplied
with the same V
When attaching a crystal to the device RESIN must
remain active until both V
(the length of time is application specific and de-
pends on the startup characteristics of the crystal
circuit) The RESIN pin is designed to operate cor-
40
CC
Figure 14 Typical Output Delay Variations versus Load Capacitance
Figure 15 Typical Rise and Fall Variations versus Load Capacitance
that supplies the processor
CC
and CLKOUT are stable
CC
rectly using a RC reset circuit but the designer must
ensure that the ramp time for V
RESIN is never sampled at a logic low level when
V
Figure 17 shows the timing sequence when RESIN
is applied after V
been operating Note that a reset will terminate all
activity and return the processor to a known operat-
ing state Any bus operation that is in progress at the
time RESIN is asserted will terminate immediately
(note that most control signals will be driven to their
inactive state first before floating)
While
A19 S16 ONCE and A18 16 are configured as in-
puts and weakly held high by internal pullup transis-
tors Only A19 ONCE can be overdriven to a low
and is used to enable the ONCE Mode Forcing
LOCK or A18 16 low at any time while RESIN is low
is prohibited and will cause unspecified device oper-
ation
CC
reaches minimum operating conditions
RESIN
272434–14
is
CC
272434–13
active
is stable and the device has
bus
CC
is not so long that
signals
LOCK