IP80C88 Intersil, IP80C88 Datasheet - Page 24

• Manufacturer Part Number: IP80C88
• Description: IC CPU 8/16BIT 5V 5MHZ 40-DIP
• Manufacturer: Intersil

Specifications of IP80C88

• Processor Type: 80C88 8/16-Bit
• Speed: 5MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Waveforms
NOTES:
12. Signals at 82C84A or 82C86 are shown for reference only.
13. The issuance of the 82C88 command and control signals (MRDC, MWTC, AMWC, IORC, IOWC, AIOWC, INTA and DEN) lags the active high
14. Status inactive in state just prior to T4.
15. Cascade address is valid between first and second INTA cycles.
16. Two INTA cycles run back-to-back. The 80C88 local ADDR/DATA bus is floating during both INTA cycles. Control for pointer address is shown
82C88 CEN.
for second INTA cycle.
SEE NOTES 22, 23
SEE NOTES 22, 23, 25
OUTPUTS
82C88 OUTPUTS
SOFTWARE
HALT - RD, MRDC, IORC, MWTC, AMWC, IOWC, AIOWC, INTA, S0, S1 = VOH
82C88
S2, S1, S0 (EXCEPT HALT)
(Continued)
(SEE NOTES 25, 26)
AMWC OR AIOWC
MWTC OR IOWC
WRITE CYCLE
FIGURE 12. BUS TIMING - MAXIMUM MODE SYSTEM (USING 82C88) (Continued)
INTA CYCLE
TCHSV (21)
24
MCE/PDEN
S2, S1, S0
AD7-AD0
AD7-AD0
AD7-AD0
(28) TSVMCH
A15-A8
A15-A8
(30) TCLMCH
DT/R
INTA
CLK
DEN
DEN
(25) TCLAZ
TCHSV
TCLAV (23)
(21)
TCLAV
(18) TCLML
(18) TCLML
(23)
TCLMCL
CASCADE ADDR
TCVNV
RESERVED FOR
(35)
T1
TCLDV
TCLAX
TCHDTL
(41)
80C88
INVALID ADDRESS
TCVNV
(35)
TCLSH
(32)
(22)
(33)
(24)
(18)TCLML
T2
TCLSH
(19) TCLMH
(6)
(22)
TCLMH
DATA
TCVNX
T3
(19)
TDVCL
(36)
POINTER
TW
(SEE NOTE 24)
TCLDX2
T4
TCLMH (19)
TCLDX1 (7)
(42)
TCHDTH
(34)
TCVNX (36)
February 22, 2008
FN2949.4