MC68340AG16VE Freescale Semiconductor, MC68340AG16VE Datasheet - Page 238

• Manufacturer Part Number: MC68340AG16VE
• Description: IC MPU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG16VE

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

5.7.3.3 MOVE INSTRUCTION. The MOVE instruction table indicates the number of clock
periods needed for the processor to calculate the destination EA and to perform a MOVE
or MOVEA instruction. For entries with CEA or FEA, refer to the appropriate table to
calculate that portion of the instruction time.
Destination EAs are divided by their formats (see 5.3.4.4 Effective Address Encoding
Summary). The total number of clock cycles is outside the parentheses. The numbers
inside parentheses (r/p/w) are included in the total clock cycle number. All timing data
assumes two-clock reads and writes.
When using this table, begin at the top and move downward. Use the first entry that
matches both source and destination addressing modes.
5.7.3.4 SPECIAL-PURPOSE MOVE INSTRUCTION. The special-purpose MOVE
instruction table indicates the number of clock periods needed for the processor to fetch,
calculate, and perform the special-purpose MOVE operation on control registers or a
specified EA. Footnotes indicate when to account for the appropriate EA times. The total
number of clock cycles is outside the parentheses. The numbers inside parentheses
(r/p/w) are included in the total clock cycle number. All timing data assumes two-clock
reads and writes.
MOTOROLA
MOVE
MOVE
MOVE
MOVE
MOVE
MOVE
MOVE
MOVE
MOVE
MOVE
MOVE
X = There is one bus cycle for byte and word operands and two bus cycles for long-word
operands. For long-word bus cycles, add two clocks to the tail and to the number of cycles.
NOTE: For instructions not explicitly listed, use the MOVE CEA , FEA entry. The source
= An # fetch EA time must be added for this instruction: FEA
Rn, Rn
Rn, (Am)
Rn, (Am)
Rn, (Am)
Rn, CEA
#, CEA
EA is calculated by the calculate EA table, and the destination EA is calculated by
the fetch EA table, even though the bus cycle is for the source EA.
FEA , Rn
FEA , (An)
FEA , (An)
FEA , (An)
CEA , FEA
Instruction
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68340 USER’S MANUAL
Go to: www.freescale.com
Head
0
0
0
1
2
1
2
2
2
2
2
Tail
0
0
2
1
2
3
2
2
2
2
2
CEA
OPER
6(0/1/x)
2(0/1/0)
2(0/1/0)
4(0/1/x)
5(0/1/x)
6(0/1/x)
5(0/1/x)
6(0/1/x)
6(0/1/x)
6(0/1/x)
6(0/1/x)
Cycles
5- 101