MPC8358EZQAGDGA Freescale Semiconductor, MPC8358EZQAGDGA Datasheet - Page 40

• Manufacturer Part Number: MPC8358EZQAGDGA
• Description: MPU POWERQUICC II PRO 668-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8358EZQAGDGA

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 668-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Local Bus
Table 40
40
Local bus clock to LALE rise
Local bus clock to output valid (except LAD/LDP and LALE)
Local bus clock to data valid for LAD/LDP
Local bus clock to address valid for LAD
Output hold from local bus clock (except LAD/LDP and LALE)
Output hold from local bus clock for LAD/LDP
Local bus clock to output high impedance for LAD/LDP
Notes:
1. The symbols used for timing specifications follow the pattern of t
2. All timings are in reference to rising edge of LSYNC_IN.
3. All signals are measured from OV
4. Input timings are measured at the pin.
5. t
6. t
7. t
8. For purposes of active/float timing measurements, the Hi-Z or off-state is defined to be when the total current delivered
Local bus cycle time
Input setup to local bus clock
Input hold from local bus clock
LALE output fall to LAD output transition (LATCH hold time)
LALE output fall to LAD output transition (LATCH hold time)
LALE output fall to LAD output transition (LATCH hold time)
Local bus clock to output valid
inputs and t
timing (LB) for the input (I) to go invalid (X) with respect to the time the t
clock one (1). Also, t
the output (O) going invalid (X) or output hold time.
signaling levels.
load on LAD output pins.
on LAD output pins.
pins.
through the component pin is less than or equal to the leakage current specification.
LBOTOT1
LBOTOT2
LBOTOT3
MPC8358E PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 3
describes the general timing parameters of the local bus interface of the device.
should be used when RCWH[LALE] is not set and when the load on LALE output pin is at least 10 pF less than the
should be used when RCWH[LALE] is set and when the load on LALE output pin is at least 10 pF less than the load
should be used when RCWH[LALE] is set and when the load on LALE output pin equals to the load on LAD output
(first two letters of functional block)(reference)(state)(signal)(state)
Table 39. Local Bus General Timing Parameters—DLL Enabled (continued)
Table 40. Local Bus General Timing Parameters—DLL Bypass Mode
LBKHOX
Parameter
Parameter
symbolizes local bus timing (LB) for the t
DD
/2 of the rising edge of LSYNC_IN to 0.4 × OV
(first two letters of functional block)(signal)(state)(reference)(state)
for outputs. For example, t
Symbol
t
t
t
t
LBOTOT1
LBOTOT2
LBOTOT3
t
t
LBKHOV
LBIVKH
LBIXKH
Symbol
t
t
t
t
t
LBK
t
LBKHOV1
LBKHOV2
LBKHOV3
LBKHOX1
LBKHOX2
t
t
LBKHLR
LBKHOZ
LBK
LBK
clock reference (K) to go high (H), with respect to
clock reference (K) goes high (H), in this case for
1
1
DD
Min
Min
1.0
1.0
1.0
1.5
2.5
15
—
—
—
—
—
—
7
3
of the signal in question for 3.3-V
LBIXKH1
Max
Max
4.5
4.5
4.5
4.5
3.8
—
—
—
—
—
—
—
—
3
Freescale Semiconductor
symbolizes local bus
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Notes
3, 4
3, 4
—
—
—
for
3
3
3
3
2
5
6
7
3