MPC8358EZQAGDGA Freescale Semiconductor, MPC8358EZQAGDGA Datasheet - Page 62

• Manufacturer Part Number: MPC8358EZQAGDGA
• Description: MPU POWERQUICC II PRO 668-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8358EZQAGDGA

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 668-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

HDLC, BISYNC, Transparent, and Synchronous UART
19.2
Table 61
transparent, and synchronous UART protocols.
62
Outputs—Internal clock delay
Outputs—External clock delay
Outputs—Internal clock high impedance
Outputs—External clock high impedance
Inputs—Internal clock input setup time
Inputs—External clock input setup time
Inputs—Internal clock input hold time
Inputs—External clock input hold time
Notes:
1. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings
2. The symbols used for timing specifications follow the pattern of t
Outputs—Internal clock delay
Outputs—External clock delay
Outputs—Internal clock high impedance
Outputs—External clock high impedance
Inputs—Internal clock input setup time
Inputs—External clock input setup time
Inputs—Internal clock input hold time
Inputs—External clock input hold time
Notes:
1. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings
2. The symbols used for timing specifications follow the pattern of t
are measured at the pin.
inputs and t
internal timing (HI) for the time t
are measured at the pin.
inputs and t
internal timing (HI) for the time t
MPC8358E PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 3
and
HDLC, BISYNC, Transparent, and Synchronous UART AC Timing
Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
(first two letters of functional block)(reference)(state)(signal)(state)
Table 62
Table 61. HDLC, BISYNC, and Transparent AC Timing Specifications
provide the input and output AC timing specifications for HDLC, BISYNC,
Characteristic
Characteristic
Table 62. Synchronous UART AC Timing Specifications
serial
serial
memory clock reference (K) goes from the high state (H) until outputs (O) are invalid (X).
memory clock reference (K) goes from the high state (H) until outputs (O) are invalid (X).
(first two letters of functional block)(signal)(state)(reference)(state)
(first two letters of functional block)(signal)(state)(reference)(state)
for outputs. For example, t
for outputs. For example, t
Symbol
Symbol
t
t
t
t
t
t
t
t
UAEKHOV
UAEKHOX
t
t
t
t
t
t
UAIKHOV
UAIKHOX
UAEIVKH
UAEIXKH
HEKHOV
HEKHOX
t
t
UAIIVKH
UAIIXKH
HIKHOV
HIKHOX
HEIVKH
HEIXKH
HIIVKH
HIIXKH
2
2
Min
-0.5
Min
8.5
1.4
0
1
1
4
1
0
1
0
1
6
8
1
1
HIKHOX
HIKHOX
1
Freescale Semiconductor
symbolizes the outputs
symbolizes the outputs
1
Max
11.2
10.8
Max
11.3
5.5
14
11
14
—
—
—
—
—
—
—
—
8
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
for
for