MC68MH360AI33L Freescale Semiconductor, MC68MH360AI33L Datasheet - Page 81

• Manufacturer Part Number: MC68MH360AI33L
• Description: IC MPU QUICC 33MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360AI33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

DPRBASE + D00
DPRBASE + D37
DPRBASE + D38
DPRBASE + DAF
DPRBASE + D80
DPRBASE + DA7
DPRBASE + DA8
DPRBASE + DAF
DPRBASE + DB0
DPRBASE + DBF
DPRBASE + D00
DPRBASE + DA3
DPRBASE + DA4
DPRBASE + DAF
DPRBASE + DB0
DPRBASE + DBF
#—TSATRx & TSATTx are mapped to an alternative SCC’s parameter RAM.
*—SPI not available in these configurations due to memory conflict.
Transparent
Transparent Regs
= 56 Bytes
Ethernet Regs
= 164 Bytes
Figure 5-8. MC68MH360 SCC2 Parameter RAM Usage
Ethernet
SPI Regs
= 40Bytes
Free Area
= 72Bytes
Timer Regs
= 16 Bytes
Timer Regs
= 16 Bytes
Free Area
= 8 Bytes
Free Area
= 12 Bytes
Freescale Semiconductor, Inc.
Locations used
for SCC registers
For More Information On This Product,
*
DPRBASE + DBF
Go to: www.freescale.com
DPRBASE + D5C
DPRBASE + DBF
DPRBASE + DAB
DPRBASE + DAC
DPRBASE + DAF
DPRBASE + D5B
DPRBASE + DAF
DPRBASE + D80
DPRBASE + DA7
DPRBASE + DA8
DPRBASE + DAF
DPRBASE + DB0
DPRBASE + DB0
DPRBASE + D00
DPRBASE + D00
Chapter 5. Buffer Descriptors
SPI Regs
= 40Bytes
HDLC Regs
= 92 Bytes
QMC Regs
= 172 Bytes
Timer Regs
= 16 Bytes
Timer Regs
= 16 Bytes
Free Area
= 36Bytes
Free Area
= 8 Bytes
Free Area
= 4 Bytes
HDLC
QMC
Locations free
for BD
*
DPRBASE + DAF
DPRBASE + DAF
DPRBASE + DB0
DPRBASE + DBF
DPRBASE + DB0
DPRBASE + DBF
DPRBASE + DAB
DPRBASE + DAC
DPRBASE + D65
DPRBASE + D66
DPRBASE + DAF
DPRBASE + D80
DPRBASE + DA7
DPRBASE + DA8
DPRBASE + D1F
DPRBASE + D20
DPRBASE + D9F
DPRBASE + DA0
DPRBASE + D00
DPRBASE + D00
QMC on
Multiple SCCs
Locations used
for secondary
registers
SPI Regs
= 40Bytes
UART Regs
= 102 Bytes
QMC Regs
= 32 Bytes
QMC Regs
=12 Bytes
Free Area
= 26Bytes
Free Area
= 8 Bytes
Timer Regs
= 16 Bytes
Free Area
= 4 Bytes
Timer Regs
= 16 Bytes
Free Area
= 128 Bytes
UART
*#