MC68MH360AI33L Freescale Semiconductor, MC68MH360AI33L Datasheet - Page 83

• Manufacturer Part Number: MC68MH360AI33L
• Description: IC MPU QUICC 33MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360AI33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

DPRBASE + F00
DPRBASE + F37
DPRBASE + F38
DPRBASE + F6F
DPRBASE + F70
DPRBASE + F7B
DPRBASE + F7C
DPRBASE + F7F
DPRBASE + F80
DPRBASE + FB7
DPRBASE + FB8
DPRBASE + FBF
DPRBASE + F00
DPRBASE + FA3
DPRBASE + FBF
DPRBASE + FA4
#—TSATRx & TSATTx are mapped to an alternative SCC’s parameter RAM,
SMC2 is not available in this configuration due to memory conflict.
*—SMC2 and IDMA2 are not available in these configurations due to memory conflict.
Figure 5-10. MC68MH360 SCC4 Parameter RAM Usage
Transparent
Transparent Regs
= 56 Bytes
Ethernet Regs
= 164 Bytes
Ethernet
IDMA2Regs
= 12 Bytes
Free Area
= 4Bytes
SMC2 Regs
= 56 Bytes
Freescale Semiconductor, Inc.
Free Area
= 8 Bytes
Free Area
= 28 Bytes
Free Area
= 56 Bytes
Locations used
for SCC registers
For More Information On This Product,
*
Go to: www.freescale.com
DPRBASE + F5B
DPRBASE + F5C
DPRBASE + F6F
DPRBASE + F70
DPRBASE + F7B
DPRBASE + F7C
DPRBASE + F7F
DPRBASE + F80
DPRBASE + FAB
DPRBASE + FAC
DPRBASE + FB7
DPRBASE + FB8
DPRBASE + FBF
DPRBASE + FBF
Chapter 5. Buffer Descriptors
DPRBASE + F00
DPRBASE + F00
Free Area
= 20Bytes
IDMA2 Regs
= 12 Bytes
Free Area
= 4Bytes
SMC2 Regs
= 56 Bytes
Locations free
for BD
HDLC Regs
= 92 Bytes
QMC Regs
= 172 Bytes
Free Area
= 8 Bytes
HDLC
Free Area
= 20Bytes
QMC
*
DPRBASE + F00
DPRBASE + F1F
DPRBASE + F20
DPRBASE + F6F
DPRBASE + F70
DPRBASE + F7B
DPRBASE + F7C
DPRBASE + F9F
DPRBASE + FA0
DPRBASE + FAB
DPRBASE + FAC
DPRBASE+F00
DPRBASE + F65
DPRBASE + F66
DPRBASE + F6F
DPRBASE + F70
DPRBASE + F7B
DPRBASE + F7C
DPRBASE + F7F
DPRBASE + F80
DPRBASE + FB7
DPRBASE + FB8
DPRBASE + FBF
DPRBASE + FBF
QMC on
Multiple SCCs
Locations used
for secondary
registers
Free Area
= 10Bytes
IDMA2 Regs
= 12 Bytes
IDMA2 Regs
= 12 Bytes
Free Area
= 4Bytes
SMC2 Regs
= 56 Bytes
Free Area
= 36 Bytes
UART Regs
= 102 Bytes
QMC Regs
= 32 Bytes
QMC Regs
=12 Bytes
Free Area
= 8 Bytes
Free Area
=80 Bytes
Free Area
= 20Bytes
UART
#