MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 36

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MC68EC040FE25A

Manufacturer Part Number
MC68EC040FE25A
Description
IC MPU 32BIT 25MHZ 184-CQFP
Manufacturer
Freescale Semiconductor
Series
M68000r
Datasheets

Specifications of MC68EC040FE25A

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
184-CQFP
Core Size
32bit
Program Memory Size
8KB
Cpu Speed
25MHz
Digital Ic Case Style
CQFP
No. Of Pins
184
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
0°C To
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
184
Package Type
CQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EC040FE25A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68EC040FE25A
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
4.11.6
There are TWO ethernet ports on the M68360QUADS-040 implemented via SCC1 and SCC2 of the
QUICC.
The first Ethernet port is implemented by connecting SCC1 to Motorola’s MC68160 EEST device. The
MC68160 provides two Ethernet interfaces: AUI (P3) and Twisted-Pair (P4). The connection between the
MC68160 and the QUICC is straight forward, and does not require external glue logic.
case however, only AUI port is implemented via P5.
To support other uses of SCC2, it’s signals are available also at the expansion connectors and the SIA
(U4) is mounted on a socket. That way the SIA can be removed freeing SCC2 signals for other use via the
expansion connector - P11.
4.11.6.1
The AUI port connectors P3 and P5 are 15 pin, female, D-type connectors as shown in FIGURE 2-6.
The list below describes the port signals. The directions ’I’, ’O’, and ’I/O’ are relative to the M68360QUADS-
040 board. (I.E. ’I’ means input to the M68360QUADS-040)
The second Ethernet port is implemented by connecting SCC2 to AMD’s SIA (Am7992) device. In this
SIMM4 to SIMM1 - These four bits, encode the data identifying the DRAM SIMM connected to the
M68360QUADS-040. For the various DRAM types supported, refer to TABLE 4-1.
BKINT* - When active ’0’, indicates that the last level 7 interrupt (NMI) was generated by the
Hardware Breakpoint logic.
OPT0* - When active ’1’, indicates that switch #5 in DSW1 is in ON position
OPT1* - When active ’1’, indicates that switch #4 in DSW1 is in ON position
OPT2* - When active ’1’, indicates that switch #3 in DSW1 is in ON position
ACX+ ( I ) - Collision Input (positive).
ATX+ ( O ) - Transmit Data (positive).
ARX+ ( I ) - Receive Data (positive).
ACX- ( I ) - Collision Input (negative).
ATX- ( O ) - Transmit Data (negative).
ARX- ( I ) - Receive Data (negative).
Ethernet Controller
Ethernet AUI Ports Signal Description
Freescale Semiconductor, Inc.
FIGURE 4-5 Ethernet AUI Port Connector
For More Information On This Product,
M68360QUADS-040 Hardware User’s Manual
Go to: www.freescale.com
ARX+
ACX+
ATX+
GND
GND
GND
GND
N.C.
6
7
8
1
2
3
4
5
13
10
11
12
14
15
9
+12V
GND
ACX-
ATX-
GND
ARX-
N.C.
FUNCTIONAL DESCRIPTION
36

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