MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 57

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MC68EC040FE25A

Manufacturer Part Number
MC68EC040FE25A
Description
IC MPU 32BIT 25MHZ 184-CQFP
Manufacturer
Freescale Semiconductor
Series
M68000r
Datasheets

Specifications of MC68EC040FE25A

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
184-CQFP
Core Size
32bit
Program Memory Size
8KB
Cpu Speed
25MHz
Digital Ic Case Style
CQFP
No. Of Pins
184
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
0°C To
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
184
Package Type
CQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EC040FE25A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68EC040FE25A
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
ADS_SEL(0:2)
ADS_ACK
PD(0:7)
HOST_REQ
B.3.2
The signal handshake during an M68360QUADS-040 to Host write cycle is shown in FIGURE B-3. The
sequence of events is as follows:
6. The Host detects the ADS_ACK signal and negates the HOST_REQ signal (data buffer is
7. The M68360QUADS-040 detects the negation of HOST_REQ signal and negates
1. The M68360QUADS-040 places a data byte on the parallel port data bus (buffer disabled)
2. The Host polls each M68360QUADS-040 address and detects the ADS_REQ signal from
3. The M68360QUADS-040 negates the ADS_REQ signal. The data appears on the bus as
4. The Host reads the data.
5. The Host negates the HST_ACK signal to end the cycle. The M68360QUADS-040 ends
Write Cycle from M68360QUADS-040 to Host
disabled).
ADS_ACK to end the cycle.
and asserts the ADS_REQ signal (the ADS_REQ signal will not appear on the port until
the board is selected by the Host).
the requesting board. The Host asserts the HST_ACK signal in response, which enables
the data buffer in the M68360QUADS-040.
long as the HST_ACK signal is asserted.
the cycle.
FIGURE B-2 Host Write to M68360QUADS-040
Freescale Semiconductor, Inc.
For More Information On This Product,
2
1
M68360QUADS-040 Hardware User’s Manual
ADDRESS VALID
Go to: www.freescale.com
3
DATA VALID
4
5
6
SUPPORT INFORMATION
7
57

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