MPC8541EVTAQF Freescale Semiconductor, MPC8541EVTAQF Datasheet - Page 80

• Manufacturer Part Number: MPC8541EVTAQF
• Description: IC MPU POWERQUICC III 783-FCPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8541EVTAQF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.0GHz
• Voltage: 1.3V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Development Tools By Supplier: RDK-IDM-SBC
• Maximum Clock Frequency: 1000 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• For Use With: MPC8548CDS - DEV TOOLS CDS FOR 8548CWH-PPC-8540N-VE - KIT EVAL SYSTEM MPC8540
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

System Design Information
The COP function of these processors allow a remote computer system (typically, a PC with dedicated
hardware and debugging software) to access and control the internal operations of the processor. The COP
interface connects primarily through the JTAG port of the processor, with some additional status
monitoring signals. The COP port requires the ability to independently assert HRESET or TRST in order
to fully control the processor. If the target system has independent reset sources, such as voltage monitors,
watchdog timers, power supply failures, or push-button switches, then the COP reset signals must be
merged into these signals with logic.
The arrangement shown in
while ensuring that the target can drive HRESET as well.
The COP interface has a standard header, shown in
based on the 0.025" square-post, 0.100" centered header assembly (often called a Berg header). The
connector typically has pin 14 removed as a connector key.
The COP header adds many benefits such as breakpoints, watchpoints, register and memory
examination/modification, and other standard debugger features. An inexpensive option can be to leave
the COP header unpopulated until needed.
There is no standardized way to number the COP header; consequently, many different pin numbers have
been observed from emulator vendors. Some are numbered top-to-bottom then left-to-right, while others
use left-to-right then top-to-bottom, while still others number the pins counter clockwise from pin 1 (as
with an IC). Regardless of the numbering, the signal placement recommended in
all known emulators.
80
MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
COP_CHKSTP_OUT
Figure 51
COP_HRESET
COP_SRESET
Figure 51. COP Connector Physical Pinout
COP_TDO
COP_TMS
COP_TCK
COP_TDI
allows the COP port to independently assert HRESET or TRST,
NC
13
15
11
1
1
3
5
7
9
No pin
Figure
KEY
10
12
16
2
4
6
8
51, for connection to the target system, and is
NC
COP_TRST
COP_VDD_SENSE
COP_CHKSTP_IN
NC
NC
GND
Figure 51
Freescale Semiconductor
is common to