UJA1076TW/5V0/WD,1 NXP Semiconductors, UJA1076TW/5V0/WD,1 Datasheet - Page 42

• Manufacturer Part Number: UJA1076TW/5V0/WD,1
• Description: IC SBC CAN HS 5V 32HTSSOP
• Manufacturer: NXP Semiconductors

Specifications of UJA1076TW/5V0/WD,1

• Controller Type: System Basis Chip
• Interface: SPI
• Voltage - Supply: 4.5 V ~ 28 V
• Current - Supply: 82µA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
UJA1076_2
Product data sheet
13.4 Reflow soldering
Key characteristics in reflow soldering are:
Table 12.
Table 13.
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see
Package thickness (mm)
< 2.5
≥ 2.5
Package thickness (mm)
< 1.6
1.6 to 2.5
> 2.5
•
•
•
Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see
reducing the process window
Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 12
SnPb eutectic process (from J-STD-020C)
Lead-free process (from J-STD-020C)
and
Figure
All information provided in this document is subject to legal disclaimers.
13
19.
Rev. 02 — 27 May 2010
Package reflow temperature (°C)
Volume (mm
< 350
235
220
Package reflow temperature (°C)
Volume (mm
< 350
260
260
250
3
3
)
)
Figure
High-speed CAN core system basis chip
350 to 2000
260
250
245
19) than a SnPb process, thus
≥ 350
220
220
245
> 2000
260
245
UJA1076
© NXP B.V. 2010. All rights reserved.
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