DP83815DVNG/NOPB National Semiconductor, DP83815DVNG/NOPB Datasheet - Page 35

• Manufacturer Part Number: DP83815DVNG/NOPB
• Description: IC CTLR/LAYER INT PCI 144-LQFP
• Manufacturer: National Semiconductor

Specifications of DP83815DVNG/NOPB

• Controller Type: Ethernet Controller, MAC/BIU
• Interface: PCI
• Voltage - Supply: 3.3V
• Current - Supply: 170mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *DP83815DVNG; *DP83815DVNG/NOPB; DP83815DVNG

4.0 Register Set
4.1.4 Configuration Latency Timer Register
This register gives status and controls such miscellaneous functions as BIST, Latency timer and Cache line size.
DP83815 Bus Master Operations:
Independent of cache line size, the DP83815 will use the following PCI commands for bus mastered transfers:
4.1.5 Configuration I/O Base Address Register
This register specifies the Base I/O address which is required to build an address map during configuration. It also
specifies the number of bytes required as well as an indication that it can be mapped into I/O space.
29-16
15-8
31-8
Bit
Bit
7-0
7-2
31
30
1
0
Bit Name
Bit Name
BISTCAP
IOBASE
BISTEN
IOSIZE
IOIND
CLS
LAT
Offset: 0Ch
Offset: 10h
0110 - Mem Read
0111 - Mem Write
(Continued)
Tag: CFGLAT
Tag: CFGIOA
BIST Capable
Reads will always return 0.
BIST Enable
Reads will return a 0, writes are ignored.
Reserved
Reads will return a 0, writes are ignored.
Latency Timer
Set by software to the number of PCI clocks that DP83815 may hold the PCI bus.
Cache Line Size
Ignored by DP83815.
Base I/O Address
This is set by software to the base I/O address for the Operational Register Map.
Size indication
Read back as 0. This allows the PCI bridge to determine that the DP83815 requires 256 bytes of I/O
space.
Unused
(reads return 0).
I/O Space Indicator
Set to 1 by DP83815 to indicate that DP83815 is capable of being mapped into I/O space. Read Only.
Access: Read Write
Access: Read Write
for all read cycles,
for all write cycles.
Size: 32 bits
Size: 32 bits
35
Description
Description
Hard Reset: 00000000h
Hard Reset: 00000001h
Soft Reset: Unchanged
Soft Reset: Unchanged
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