DP83815DVNG/NOPB National Semiconductor, DP83815DVNG/NOPB Datasheet - Page 64

• Manufacturer Part Number: DP83815DVNG/NOPB
• Description: IC CTLR/LAYER INT PCI 144-LQFP
• Manufacturer: National Semiconductor

Specifications of DP83815DVNG/NOPB

• Controller Type: Ethernet Controller, MAC/BIU
• Interface: PCI
• Voltage - Supply: 3.3V
• Current - Supply: 170mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *DP83815DVNG; *DP83815DVNG/NOPB; DP83815DVNG

4.0 Register Set
4.2.19 Boot ROM Address Register
The BRAR is used to setup the address for an access to an external ROM/FLASH device.
4.2.20 Boot ROM Data Register
The BRDR is used to read and write ROM/FLASH data from the data from/to an external ROM/FLASH device.
4.2.21 Silicon Revision Register
30-16
31-16
15-0
31-0
15-0
Bit
Bit
Bit
31
Bit Name
Bit Name
Bit Name
AUTOINC
ADDR
DATA
Rev
Offset: 0050h
Offset: 0054h
Offset: 0058h
(Continued)
Tag: BRAR
Tag: BRDR
Tag: SRR
Auto-Increment
When set, the contents of ADDR will auto increment with every 32-bit access to the BRDR register.
unused
Boot ROM Address
16-bit address used to access the external Boot ROM.
Boot ROM Data
Access port to external Boot ROM. Software can use BRAR and BRDR to read (and write if FLASH
memory is used) the external Boot ROM. All accesses must be 32-bits wide and aligned on 32-bit
boundaries.
unused
(reads return 0)
Revision Level
SRR register value for the DP83815 silicon.
DP83815CVNG
DP83815DVNG/UJB 00000403h
00000302h
Access: Read Write
Access: Read Write
Access: Read Only
Size: 32 bits
Size: 32 bits
Size: 32 bits
64
Description
Description
Description
Hard Reset: FFFFFFFFh
Hard Reset: undefined
Hard Reset: as defined
Soft Reset: unchanged
Soft Reset: undefined
Soft Reset: unchanged
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