DP83953VUL National Semiconductor, DP83953VUL Datasheet - Page 50

• Manufacturer Part Number: DP83953VUL
• Description: IC CTRLR RIC REPEATER 160-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83953VUL

• Controller Type: Ethernet Repeater Interface Controller
• Interface: IEEE 802.3
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 870mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83953VUL

7.0 RIC2A Registers
RIC2A Register Address Map
The RIC2A's registers may be accessed by applying the
required address to the five Register Address (RA(4:0))
input pins. Pin RA4 makes the selection between the upper
and lower halves of the register array. The lower half of the
register map consists of 16 registers:
T
T
T
T
These registers may be directly accessed at any time via
the RA(4:0) pins, (RA4 = 0).
Note: Registers written in bold are not present in the RIC.
Address
one RIC2A Real Time Status and Configuration register,
13 Port Real Time Status registers,
one RIC2A Configuration Register
one Real Time Interrupt Status Register.
0AH
0BH
0CH
0DH
0EH
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0FH
10H
11H
12H
13H
14H
15H
16H
17H
18H
Lower Event Count Mask
Event Record Mask Reg-
RIC2A Address Register
Configuration Register
Management/Interrupt
Device Type Register
Packet Compress
Register (ECMR)
Decode Register
Upper ECMR
ECIMR - 2
PAGE (0)
ister
Table 8. RIC2A Register Address Map
Port 1 Event Record Reg-
RIC2A Status and Configuration Register
Port 2 ERR
Port 3 ERR
Port 4 ERR
Port 5 ERR
Port 6 ERR
Port 7 ERR
Port 8 ERR
ister (ERR)
PAGE (1)
RIC2A Configuration Register
Real Time Interrupt Register
Port 10 Status Register
Port 11 Status Register
Port 12 Status Register
Port 13 Status Register
Port 1 Status Register
Port 2 Status Register
Port 3 Status Register
Port 4 Status Register
Port 5 Status Register
Port 6 Status Register
Port 7 Status Register
Port 8 Status Register
Port 9 Status Register
Page Select Register
Name
50
The upper half of the register map, (RA4 = 1), is organized
as 15 pages of registers. These pages include registers for
port security configuration (global and on a per port basis),
event count registers, port CAM and shared CAM loca-
tions, CAM location mask registers, etc. See Memory Map
and Register Description sections for details.
Register access within these pages is performed using the
RA(4:0) pins, (RA4 = 1). Page switching is performed by
writing to the Page Selection bits (PSEL3,2,1, and 0).
These bits are found in the Page Select Register, located at
address 10 hex on each page of the upper half of the regis-
ter array. At power on these bits default to 0 Hex, i.e., page
zero.
Port 1 Lower Event Count
Port 2 Lower ECR
Port 2 Upper ECR
Port 1 Upper ECR
Port 3 Lower ECR
Port 3 Upper ECR
Port 4 Lower ECR
Register (ECR)
PAGE (2)
res
Port 10 Lower ECR
Port 10 Upper ECR
Port 11 Lower ECR
Port 8 Lower ECR
Port 8 Upper ECR
Port 9 Lower ECR
Port 9 Upper ECR
PAGE (3)
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