MC33889BDWR2 Freescale Semiconductor, MC33889BDWR2 Datasheet - Page 24

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MC33889BDWR2

Manufacturer Part Number
MC33889BDWR2
Description
IC SYSTEM BASE W/CAN 28-SOIC
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC33889BDWR2

Controller Type
System Basis Chip
Interface
CAN
Voltage - Supply
5.5 V ~ 18 V
Current - Supply
45mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
automotive applications. It includes the following functions:
• One full protected voltage regulator with 200 mA total
• Driver for external path transistor for V2 regulator function.
RECEIVE AND TRANSMIT DATA (RX AND TX)
respectively) are connected to a microcontroller’s CAN
protocol handler. TX is an input and controls the CANH and
CANL line state (dominant when TX is LOW, recessive when
TX is HIGH). RX is an output and reports the bus state (RX
LOW when CAN bus is dominant, HIGH when CAN bus is
recessive).
VOLTAGE REGULATOR ONE (VDD1)
regulator. It can deliver up to 200 mA. This output is protected
against overcurrent and overtemperature. It includes an
overtemperature pre-warning flag, which is set when the
internal regulator temperature exceeds 130°C typical. When
the temperature exceeds the overtemperature shutdown
(170°C typical), the regulator is turned off. VDD1 includes an
undervoltage reset circuitry, which sets the RST pin LOW
when VDD is below the undervoltage reset threshold.
RESET (RST)
device is in reset mode. The RST pin is set HIGH when the
device is not in reset mode. RST includes an internal pullup
current source. When RST is LOW, the sink current capability
is limited, allowing RST to be shorted to 5.0 V for software
debug or software download purposes.
INTERRUPT (INT)
interrupt occurs. INT is enabled using the Interrupt Register
(INTR). When an interrupt occurs, INT stays LOW until the
interrupt source is cleared. INT output also reports a wake-up
event by a 10 sec. typical pulse when the device is in Stop
mode.
GROUND (GND)
V2CTRL (V2CTRL)
connected to the external series pass transistor.
24
33889
FUNCTIONAL DESCRIPTION
INTRODUCTION
The MC33889 is an integrated circuit dedicated to
output current capability.
The RX and TX pins (receive data and transmit data pins,
The VDD1 pin is the output pin of the 5.0 V internal
The Reset pin RST is an output that is set LOW when the
The Interrupt pin INT is an output that is set LOW when an
This pin is the ground of the integrated circuit.
The V2CTRL pin is the output drive pin for the V2 regulator
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
INTRODUCTION
• Reset, programmable watchdog function
• Four operational modes
• Wake-up capabilities: Forced wake-up, cyclic sense and
• Can low speed fault tolerant physical interface.
VOLTAGE SUPPLY (VSUP)
HIGH-SIDE OUTPUT 1 (HS1)
internally protected against overcurrent and
overtemperature.
LEVEL 0-1 INPUTS (L0: L1)
the output of other ICs for external inputs. The input states
can be read by the SPI. These inputs can be used as wake-
up events for the SBC when operating in the Sleep or Stop
mode.
VOLTAGE REGULATOR TWO (V2)
connected to the external series pass transistor. V2 is also
the 5.0 V supply of the internal CAN interface. It is possible to
connect V2 to an external 5.0 V regulator or to the VDD
output when no external series pass transistor is used. In this
case, the V2CTRL pin must be left open.
RTH (RTH)
CANH
RTL (RTL)
CANL
CAN HIGH AND CAN LOW OUTPUTS
(CANH AND CANL)
CAN bus lines. They are controlled by TXD input level, and
the state of CANH and CANL is reported through RXD output.
SYSTEM CLOCK (SCLK)
peripheral interface.
wake-up inputs, CAN and the SPI
The VSUP pin is the battery supply input of the device.
The HS pin is the internal high-side driver output. It is
The L0: L1 pins can be connected to contact switches or
The V2 pin is the input sense for the V2 regulator. It is
Pin for the connection of the bus termination resistor to
Pin for the connection of the bus termination resistor to
The CAN High and CAN Low pins are the interfaces to the
SCLK is the Serial Data Clock input pin of the serial
Analog Integrated Circuit Device Data
Freescale Semiconductor

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