MC33889BDWR2 Freescale Semiconductor, MC33889BDWR2 Datasheet - Page 41

• Manufacturer Part Number: MC33889BDWR2
• Description: IC SYSTEM BASE W/CAN 28-SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MC33889BDWR2

• Controller Type: System Basis Chip
• Interface: CAN
• Voltage - Supply: 5.5 V ~ 18 V
• Current - Supply: 45mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 8. List of Registers
Register description
Table 9. MCR Register
Table 10. Control bits
Analog Integrated Circuit Device Data
Freescale Semiconductor
MCR
MCTR2
Name
WUR
MCR
INTR
RCR
CAN
LPC
IOR
TIM
Reset condition
0
0
0
0
$000b
Reset
Address
$0 0 0
$0 0 1
$0 1 0
$0 1 1
$1 0 0
$1 0 1
$1 1 0
$1 1 1
MCTR1
0
0
1
1
W
R
Wake-up input register
Reset control register
Mode control register
CAN control register
I/O control register
Low power mode
Interrupt register
Timing register
control register
MCTR0
Description
D3
0
1
0
1
BATFAIL
0
SBC MODE
Enter/leave debug mode
Stop, watchdog off
Write: Control of normal, standby, sleep, and stop modes
Read: BATFAIL flag and other status bits and flags
Write: Configuration of reset voltage level, WD in stop mode, low power
mode selection
Write: CAN module control: TX/RX, Rec only, term VBAT, Normal and
extended modes, filter at L0 input.
Read: CAN failure status bits
Write: HS1 (high-side switch) control in normal and standby mode.
Read: HS1 over temp bit, SHIFT bit (gnd shift above selection), V
below 6.1V, V2 below 4.0 V
Write: Control of wake-up input polarity
Read: Wake-up input, and real time LX input state
Write: TIM1, Watchdog timing control, window or Timeout mode.
Write: TIM2, Cyclic sense and force wake-up timing selection
Write: HS1 periodic activation in sleep and stop modes
Force wake-up control
Write: Interrupt source configuration
Read: INT source
Standby
Normal
D2
POR, RESET
VDDTEMP
Read: CAN wake-up event, Tx permanent dominant
MCTR2
0
(2)
Gnd shift register level selection
DESCRIPTION
Standby mode and BATFAIL
Comment and usage
To enter debug mode, SBC must be in Normal or
D1
leave debug mode, BATFAIL must be at 0.
POR, RESET
MCTR1
GFAIL
0
LOGIC COMMANDS AND REGISTERS
FUNCTIONAL DEVICE OPERATION
(1)
D0
must be still at 1. To
POR, RESET
WDRST
MCTR0
0
SUP
33889
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