ICS1893AFT IDT, Integrated Device Technology Inc, ICS1893AFT Datasheet - Page 55

• Manufacturer Part Number: ICS1893AFT
• Description: PHYCEIVER LOW PWR 3.3V 48-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893AFT

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Other names: 1893AFT; 800-1920-2; ICS1893AFT

Chapter 8 Management Register Set
ICS1893AF, Rev. D 10/26/04
The tables in this chapter detail the functionality of the bits in the management register set. The tables
include the register locations, the bit positions, the bit definitions, the STA Read/Write Access Types, the
default bit values, and any special bit functions or capabilities (such as self-clearing). Following each table
is a description of each bit. This chapter includes the following sections:
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Section 8.1, “Introduction to Management Register Set”
Section 8.2, “Register 0: Control Register”
Section 8.3, “Register 1: Status Register”
Section 8.4, “Register 2: PHY Identifier Register”
Section 8.5, “Register 3: PHY Identifier Register”
Section 8.6, “Register 4: Auto-Negotiation Register”
Section 8.7, “Register 5: Auto-Negotiation Link Partner Ability Register”
Section 8.8, “Register 6: Auto-Negotiation Expansion Register”
Section 8.9, “Register 7: Auto-Negotiation Next Page Transmit Register”
Section 8.10, “Register 8: Auto-Negotiation Next Page Link Partner Ability Register”
Section 8.11, “Register 16: Extended Control Register”
Section 8.12, “Register 17: Quick Poll Detailed Status Register”
Section 8.13, “Register 18: 10Base-T Operations Register”
Section 8.14, “Register 19: Extended Control Register 2”
ICS1893AF Data Sheet - Release
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
55
Chapter 8 Management Register Set
October, 2004