PIC18F2455-I/SP Microchip Technology Inc., PIC18F2455-I/SP Datasheet - Page 74

• Manufacturer Part Number: PIC18F2455-I/SP
• Description: Microcontroller; 24 KB Flash; 2048 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2455-I/SP

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 23
• Interface: I2C/SPI/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 24K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2450/4450
5.6.3
The use of Indexed Literal Offset Addressing mode
effectively changes how the lower portion of Access
RAM (00h to 5Fh) is mapped. Rather than containing
just the contents of the bottom half of Bank 0, this mode
maps the contents from Bank 0 and a user-defined
“window” that can be located anywhere in the data
memory space. The value of FSR2 establishes the
lower boundary of the addresses mapped into the
window, while the upper boundary is defined by FSR2
plus 95 (5Fh). Addresses in the Access RAM above
5Fh are mapped as previously described (see
Section 5.3.3 “Access Bank”). An example of Access
Bank remapping in this addressing mode is shown in
Figure 5-9.
FIGURE 5-9:
DS39760A-page 72
Example Situation:
Locations in the region
from the FSR2 Pointer
(120h) to the pointer plus
05Fh (17Fh) are mapped
to
Access RAM (000h-05Fh).
Special Function Regis-
ters at F60h through FFFh
are
through FFh as usual.
Bank 0 addresses below
5Fh are not available in
this mode. They can still
be addressed by using the
BSR.
ADDWF f, d, a
FSR2H:FSR2L = 120h
the
mapped
MAPPING THE ACCESS BANK IN
INDEXED LITERAL OFFSET MODE
bottom
to
of
REMAPPING THE ACCESS BANK WITH INDEXED LITERAL
OFFSET ADDRESSING
60h
the
FFFh
17Fh
F00h
F60h
000h
100h
120h
200h
Data Memory
Bank 14
Bank 15
Window
through
Bank 1
Bank 0
Bank 2
Advance Information
SFRs
Remapping of the Access Bank applies only to
operations using the Indexed Literal Offset mode.
Operations that use the BSR (Access RAM bit is ‘1’) will
continue to use Direct Addressing as before. Any
indirect or indexed operation that explicitly uses any of
the indirect file operands (including FSR2) will continue
to operate as standard Indirect Addressing. Any
instruction that uses the Access Bank, but includes a
register address of greater than 05Fh, will use Direct
Addressing and the normal Access Bank map.
5.6.4
Although the Access Bank is remapped when the
extended instruction set is enabled, the operation of the
BSR remains unchanged. Direct Addressing, using the
BSR to select the data memory bank, operates in the
same manner as previously described.
BSR IN INDEXED LITERAL
OFFSET MODE
© 2006 Microchip Technology Inc.
Bank 1 “Window”
Access Bank
SFRs
00h
5Fh
60h
FFh