PIC16F1826-I/ML Microchip Technology Inc., PIC16F1826-I/ML Datasheet - Page 81

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PIC16F1826-I/ML

Manufacturer Part Number
PIC16F1826-I/ML
Description
28 QFN 6x6mm TUBE, 3.5 KB Flash, 256 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhance
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F1826-I/ML

A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin QFN
Programmable Memory
3.5K Bytes
Ram Size
256 Bytes
Speed
32 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
8.0
The interrupt feature allows certain events to preempt
normal program flow. Firmware is used to determine
the source of the interrupt and act accordingly. Some
interrupts can be configured to wake the MCU from
Sleep mode.
This chapter contains the following information for
Interrupts:
• Operation
• Interrupt Latency
• Interrupts During Sleep
• INT Pin
• Automatic Context Saving
Many peripherals produce Interrupts. Refer to the
corresponding chapters for details.
A block diagram of the interrupt logic is shown in
Figure
FIGURE 8-1:
 2011 Microchip Technology Inc.
RBx
8-1.
INTERRUPTS
IOCBNx
IOCBPx
Q2
Q4Q1
Q1
Q3
Q4
Q2
INTERRUPT LOGIC
Q4
Q4Q1
D
D
CK
CK
R
R
Q1
Q
Q
Q2
Write IOCBFx
Q3
Q4Q1
Data bus =
0 or 1
IOCBFx individual
Q4
From all other
Detect
pin detectors
Edge
Q4Q1
D
CK
Q1
PIC16(L)F1826/27
S
Q
Q2
To data bus
Q3
IOCBFx
IOCIE
Q4
Q4Q1
DS41391D-page 81
IOC interrupt
to CPU core

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