L6213 STMicroelectronics, L6213 Datasheet - Page 4

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L6213

Manufacturer Part Number
L6213
Description
MOSFET & Power Driver ICs DISC BY STM 5/00 4A SOLENOID DR
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6213

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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L6213
PIN DESCRIPTION
ELECTRICAL CHARACTERISTICS (Refer to the application circuit, T
50mA, VPS from 12V to 46V; unless otherwise specified.
STEP-DOWN SECTION
4/9
10, 4
2, 10
2, 10
15, 16
Pin
14
10
10
10
11
11
5, 6
Nr.
10
11
12
13
14
17
18
19
20
1
2
3
4
7
8
9
Symbol
R
t
t
DS on
I
h on
h off
V
t
t
V
I
lim
dp
off
I
I
B
i
i
o
Out-Down
i
ENABLE
Out-Up
RESET
Name
R
GND
GND
ISTP
+V
BSE
PFP
BSA
PIM
V
CD
V
VD
PF
sense
out
S2
S1
Supply Voltage
Output Voltage
On State Drain Resistance
Turn-on Threshold
Turn-off Threshold
Input Bias Current
Static Current Limiting
Total Input Current
Total Input Current
Protection Current Maximum
Delay Time
Minimum Power off State
Solenoid section upper DMOS output.
Solenoid section upper DMOS bootstrap. A capacitor connected between pin 2 and pin 1
ensures the efficient driving of the solenoid section upper DMOS.
Solenoid control input - TTL compatible.
Unregulated voltage input - Solenoid section.
Ground.
Power fail output, the saturation of PF is guaranteed if VPS exceed 3V. PF is at logic 1 a
time T
down under 18V. (see fig. 1)
Power fail programming. A resistor divider connected to VPS changes the Power fail
threshold levels.
Capacitor delay. A capacitor connected to this pin determines the Reset signal delay time
t
Unregulated voltage input - SMPS sections.
Regulator output and diode voltage control.
SMPS section DMOS bootstrap. A capacitor connected between pin 12 and pin 11
ensures efficient driving of SMPS DMOS.
Reset output. The saturation of Reset is guaranteed if VPS exceeds 3V. The Reset output
reaches the logic level 1 a time delay (set by capacitor CD) after VPS has reached a
rising threshold voltage. Reset reaches 0 level when VPS goes down below folling
threshold.
Feed back input of the regulation loop.
Ground.
Connection for solenoid sensing resistor.
Programming of solenoid current rising edge. An RC network connected to this pin
determines the slope of the solenoid current rising edge.
Programming of solenoid current histeresys.
Solenoid section lower DMOS output.
Parameter
d
.
1
after RESET reached the high level. PF came back to logic 0 when VPS goes
I
T
VPS Rising Fig. 1
VPS Falling Fig. 1
ENABLE = 1, VPS = 46V,
I
ENABLE = 1, VPS = 15V,
I
VPS = 46V I
O
load
load
J
= 0.05 to 1A
= 25 C; VPS = 15 to 46V
= 0
= 0
Test Condition
O
Description
= 50mA
J
Min.
4.85
2.2
4.2
14
10
10
=25 C, I
Typ.
0.56
out
Power Supply =
Max.
5.2
0.7
3.4
7.8
46
12
12
15
13
18
1
Unit
mA
mA
mA
V
V
V
V
A
s
s

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