MM912H634CV1AER2 Freescale Semiconductor, MM912H634CV1AER2 Datasheet - Page 175

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MM912H634CV1AER2

Manufacturer Part Number
MM912H634CV1AER2
Description
64KS12 LIN2xLS/HS Isense
Manufacturer
Freescale Semiconductor
Series
-r
Datasheet

Specifications of MM912H634CV1AER2

Applications
Automotive
Core Processor
HCS12
Program Memory Type
FLASH (64 kB)
Controller Series
HCS12
Ram Size
6K x 8
Interface
LIN
Number Of I /o
-
Voltage - Supply
5.5 V ~ 27 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-LQFP Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
4.29.5.1
The S12PMMC controls the address buses and the data buses that interface the bus masters (CPU12, S12SBDM) with the rest
of the system (master buses). In addition the MMC handles all CPU read data bus swapping operations. All internal resources
are connected to specific target buses (see
Freescale Semiconductor
CPU and BDM
Local Memory Map
0x8000
0xC000
0x0400
0x0000
0x1400
0xFFFF
0x4000
Chip Bus Control
Unpaged P-Flash
Unpaged P-Flash
Unpaged P-Flash
P-Flash window
REGISTERS
D-Flash
RAM
Figure 53. Implemented Global Address Mapping
0
Figure
MM912_634 Advance Information, Rev. 4.0
0
0
PPAGE
0
54).
P3
P2
P1
P0
RAM_LOW
0x0_0000
0x0_4000
0x0_4400
0x0_5400
0x3_FFFF
0x0_8000
PF_LOW
Global Memory Map
Unimplemented Area
Unimplemented area
NVM Resources
NVM Resources
REGISTERS
D-Flash
P-Flash
RAM
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