PIC32MX795F512LT-80V/BG Microchip Technology, PIC32MX795F512LT-80V/BG Datasheet - Page 139

• Manufacturer Part Number: PIC32MX795F512LT-80V/BG
• Description: 512 KB Flash, 128 KB RAM, USB-OTG, Dual CAN, Ethernet, 80 MHz, 10-Bit ADC, DMA 1
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX795F512LT-80V/BG

• Processor Series: PIC32MX7xx
• Core: MIPS
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• Interface Type: USB, I2C, UART, RS-232, RS-485, SPI
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: XBGA-100
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current (max): 10 mA
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: -
• Eeprom Size: -
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

15.0
The Input Capture module is useful in applications
requiring frequency (period) and pulse measurement.
The Input Capture module captures the 16-bit or 32-bit
value of the selected Time Base registers when an
event occurs at the ICx pin. The following events cause
capture events:
FIGURE 15-1:
© 2009-2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
INPUT CAPTURE
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 15. “Input
Capture” (DS61122) of the “PIC32
Family Reference Manual” , which is
available from the Microchip web site
(www.microchip.com/PIC32).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
ICM<2:0>
Prescaler
ICx Input
1, 4, 16
INPUT CAPTURE BLOCK DIAGRAM
ICM<2:0>
FEDGE
Edge Detect
ICxCON
FIFO Control
ICBNE
ICI<1:0>
in
ICOV
ICTMR
C32
Generation
1.
2.
3.
4.
Each input capture channel can select between one of
two 16-bit timers (Timer2 or Timer3) for the time base,
or two 16-bit timers (Timer2 and Timer3) together to
form a 32-bit timer. The selected timer can use either
an internal or external clock.
Other operational features include:
• Device wake-up from capture pin during CPU
• Interrupt on input capture event
• 4-word FIFO buffer for capture values
• Input capture can also be used to provide
Interrupt
Interrupt
Event
PIC32MX5XX/6XX/7XX
Sleep and Idle modes
Interrupt optionally generated after 1, 2, 3 or 4
buffer locations are filled
additional sources of external interrupts
ICxBUF<31:16>
Simple capture event modes
- Capture timer value on every falling edge of
- Capture timer value on every rising edge of
Capture timer value on every edge (rising and
falling)
Capture timer value on every edge (rising and
falling), specified edge first.
Prescaler capture event modes
- Capture timer value on every 4th rising
- Capture timer value on every 16th rising
edge of input at ICx pin
edge of input at ICx pin
input at ICx pin
input at ICx pin
Data Space Interface
Peripheral Data Bus
ICxBUF<15:0>
Timer3 Timer2
0
1
DS61156G-page 139