PIC32MX795F512LT-80V/BG Microchip Technology, PIC32MX795F512LT-80V/BG Datasheet - Page 145

• Manufacturer Part Number: PIC32MX795F512LT-80V/BG
• Description: 512 KB Flash, 128 KB RAM, USB-OTG, Dual CAN, Ethernet, 80 MHz, 10-Bit ADC, DMA 1
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX795F512LT-80V/BG

• Processor Series: PIC32MX7xx
• Core: MIPS
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• Interface Type: USB, I2C, UART, RS-232, RS-485, SPI
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: XBGA-100
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current (max): 10 mA
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: -
• Eeprom Size: -
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

18.0
© 2009-2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
INTER-INTEGRATED
CIRCUIT™ (I
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 24. “Inter-
Integrated Circuit™ (I
in the “PIC32 Family Reference Manual” ,
which is available from the Microchip web
site (www.microchip.com/PIC32).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
2
C™)
2
C™)” (DS61116)
in
The I
for both Slave and Multi-Master modes of the I
communication standard.
I
Each I
clock and the SDAx pin is data.
Each I
• I
• I
• I
• I
• Serial clock synchronization for the I
• I
• Provides support for address bit masking
2
PIC32MX5XX/6XX/7XX
C module block diagram.
operation
addressing
master and slaves
be used as a handshake mechanism to suspend
and resume serial transfer (SCLREL control)
collision and arbitrates accordingly
2
2
2
2
2
C interface supporting both master and slave
C Slave mode supports 7-bit and 10-bit addressing
C Master mode supports 7-bit and 10-bit
C port allows bidirectional transfers between
C supports multi-master operation; detects bus
2
C module provides complete hardware support
2
2
C module has a 2-pin interface: the SCLx pin is
C module offers the following key features:
Figure 18-1
DS61156G-page 145
2
C port can
illustrates the
2
C serial