STM32W108CBU61TR STMicroelectronics, STM32W108CBU61TR Datasheet - Page 131

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STM32W108CBU61TR

Manufacturer Part Number
STM32W108CBU61TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheets

Specifications of STM32W108CBU61TR

Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number:
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STM32W108CB, STM32W108HB
Slave mode: Gated mode
In Gated mode the counter is enabled depending on the level of a selected input.
In the following example, the up-counter counts only when the TI1 input is low:
The counter starts counting on the internal clock as long as TI1 is low and stops as soon as
TI1 becomes high. The INT_TIMTIF flag in the INT_TIMxFLAG register is set when the
counter starts and when it stops.
The delay between the rising edge on TI1 and the actual stop of the counter is due to the
resynchronization circuit on the TI1 input.
Figure 41. Control circuit in Gated mode
Slave mode: Trigger mode
In Trigger mode the counter starts in response to an event on a selected input.
In the following example, the up-counter starts in response to a rising edge on the TI2 input:
When a rising edge occurs on TI2, the counter starts counting on the internal clock and the
INT_TIMTIF flag is set.
Configure channel 1 to detect low levels on TI1 Configure the input filter duration. In
this example, no filter is required, so TIM_IC1F = 0000. The capture prescaler is not
used for triggering, so it is not configured. The TIM_CC1S bits select the input capture
source only, TIM_CC1S = 01 in the TIMx_CCMR1 register. Write TIM_CC1P = 1 in the
TIMx_CCER register to validate the polarity (and detect low level only).
Configure the timer in Gated mode by writing TIM_SMS = 101 in the TIMx_SMCR
register. Select TI1 as the input source by writing TIM_TS = 101 in the TIMx_SMCR
register.
Enable the counter by writing TIM_CEN = 1 in the TIMx_CR1 register. In Gated mode,
the counter does not start if TIM_CEN = 0, regardless of the trigger input level.
Configure channel 2 to detect rising edges on TI2 Configure the input filter duration. In
this example, no filter is required so TIM_IC2F = 0000. The capture prescaler is not
used for triggering, so it is not configured. The TIM_CC2S bits select the input capture
source only, TIM_CC2S = 01 in the TIMx_CCMR1 register. Write TIM_CC2P = 0 in the
TIMx_CCER register to validate the polarity and detect high level only.
Configure the timer in Trigger mode by writing TIM_SMS = 110 in the TIMx_SMCR
register. Select TI2 as the input source by writing TIM_TS = 110 in the TIMx_SMCR
register.
Doc ID 16252 Rev 8
General-purpose timers
131/209

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