EL9111IL-T13 Intersil, EL9111IL-T13 Datasheet
EL9111IL-T13
Specifications of EL9111IL-T13
Related parts for EL9111IL-T13
EL9111IL-T13 Summary of contents
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... VOUT_R EXPOSED DIEPLATE SHOULD BE CONNECTED TO -5V CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. All other trademarks mentioned are the property of their respective owners. EL9111, EL9112 FN7450.4 EL9112 ...
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... Ordering Information PART NUMBER EL9111IL 9111IL EL9111IL-T7 9111IL EL9111IL-T13 9111IL EL9111ILZ (Note) 9111ILZ EL9111ILZ-T7 (Note) 9111ILZ EL9111ILZ-T13 (Note) 9111ILZ EL9112IL 9112IL EL9112IL-T7 9112IL EL9112IL-T13 9112IL EL9112ILZ (Note) 9112ILZ EL9112ILZ-T7 (Note) 9112ILZ EL9112ILZ-T13 (Note) 9112ILZ NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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... Gain Gain 3 EL9111, EL9112 Thermal Information = +25°C) Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C Die Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C - -0. +0.5V Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below S S http://www.intersil.com/pbfree/Pb-FreeReflow.asp = +5V -5V +25°C, exposed die plate = -5V, unless otherwise specified ...
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... DC to 100kHz, ±5V supply ref for guaranteed IN LOGIC high level ref for guaranteed low IN LOGIC level LOGIC LOGIC EL9111IL EL9112IL PIN FUNCTION PIN NAME VSMO_B VOUT_B VSPO_B VSPO_G VOUT_G VSMO_G VSMO_R VOUT_R VSPO_R VGAIN_R VGAIN_G VGAIN_B VINM_R VINM_G MIN TYP MAX 3 3 ...
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... CTRL 3 R =150Ω LOAD 10M FREQUENCY (Hz) FIGURE 1. FREQUENCY RESPONSE OF ALL CHANNELS FIGURE 3. GAIN vs FREQUENCY FOR VARIOUS V 5 EL9111, EL9112 EL9111IL EL9112IL PIN FUNCTION PIN NAME VINM_B VSP VCM_R VCM_G and V logic outputs VCM_B OUT OUT X2 ENABLE 0V 100M 200M FIGURE 2. GAIN vs FREQUENCY ALL CHANNELS FIGURE 4 ...
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Typical Performance Curves FIGURE 5. GAIN vs FREQUENCY FOR VARIOUS V CABLE LENGTHS FIGURE 7. GROUP DELAY vs FREQUENCY FOR VARIOUS V CTRL FIGURE 9. OFFSET EL9111, EL9112 (Continued) AND CTRL CTRL FIGURE 6. CHANNEL MISMATCH FIGURE ...
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Typical Performance Curves -10 V =0.35V GAIN (ALL CHANNELS) V =0V -20 CTRL X =HIGH 2 -40 -60 -80 -100 100K 1M 10M FREQUENCY (Hz) FIGURE 11. COMMON-MODE REJECTION =0V CTRL V =0V GAIN -20 ...
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Typical Performance Curves FIGURE 17. GREEN CROSSTALK FIGURE 19. RED CROSSTALK FIGURE 21. RISE TIME AND FALL TIME 8 EL9111, EL9112 (Continued) FIGURE 22. PULSE RESPONSE FOR VARIOUS CABLE FIGURE 18. GREEN CROSSTALK FIGURE 20. RED CROSSTALK LENGTHS FN7450.4 May ...
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Typical Performance Curves FIGURE 23. TOTAL HARMONIC DISTORTION FIGURE 25. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE 9 EL9111, EL9112 (Continued) 1.2 0.8 0.6 0.4 0.2 FIGURE 24. PACKAGE POWER DISSIPATION vs AMBIENT JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD ...
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Applications Information Logic Control The EL9112 has two logical input pins, Chip Enable (ENABLE) and Switch Gain (X2). The logic circuits all have a nominal threshold of 1.1V above the potential of the logic reference pin (VREF). In most applications ...
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Decoding is based on the EL4543 encoding scheme, as described in Figure 27 and Table 1. The scheme is a three- level system, which has been designed such that the sum of the common mode voltages results in a fixed ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...
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Package Outline Drawing L28.4x5A 28 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 10/06 4.00 PIN 1 INDEX AREA TOP VIEW PACKAGE BOUNDARY (2.65) (3.20) TYPICAL RECOMMENDED LAND PATTERN 13 EL9111, EL9112 A 0. 0.10 2X 0.50 ...