SAA7114HV2 NXP Semiconductors, SAA7114HV2 Datasheet - Page 123

• Manufacturer Part Number: SAA7114HV2
• Manufacturer: NXP Semiconductors

Specifications of SAA7114HV2

• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
SAA7114_3
Product data sheet
11.4.3 Examples
Table 131: Example of configurations
Table 132: Scaler and interface configuration example
Example
number
1
2
3
4
I
address
(hex)
Global settings
80
83
84
85
86
87
2
C-bus
Scaler source and reference events
analog input to 8-bit I port output, with
SAV/EAV codes, 8-bit serial byte stream
decoder output at X port; acquisition trigger
at falling edge vertical and rising edge
horizontal reference signal; H and V gates on
IGPH and IGPV, IGP0 = VBI sliced data flag,
IGP1 = FIFO almost full, level
qualifier logic 1 active
analog input to 16-bit output, without
SAV/EAV codes, Y on I port, C
H port and decoder output at X port;
acquisition trigger at falling edge vertical and
rising edge horizontal reference signal;
H and V-pulses on IGPH and IGPV, output
FID on IGP0, IGP1 fixed to logic 1, IDQ
qualifier logic 0 active
X port input 8-bit with SAV/EAV codes, no
reference signals on XRH and XRV, XCLK as
gated clock; field detection and acquisition
trigger on different events; acquisition
triggers at rising edge vertical and rising
edge horizontal; I port output 8-bit with
SAV/EAV codes like example number 1
X port and H port for 16-bit Y-C
input (if no 16-bit output selected);
XRH and XRV as references; field detection
and acquisition trigger at falling edge vertical
and rising edge horizontal; I port output 8-bit
with SAV/EAV codes, but Y only output
Main functionality
task enable, IDQ and back-end
clock definition
XCLK output phase and X port
output enable
IGPH, IGPV, IGP0 and IGP1
output definition
signal polarity control and
I port byte swapping
FIFO flag thresholds and
video/text arbitration
ICLK and IDQ output phase
and I port enable
Rev. 03 — 17 January 2006
B
B
-C
24, IDQ
-C
Example 1
Hex
10
01
A0
10
45
01
R
R
on
4 : 2 : 2
Dec
-
-
-
-
-
-
Input
window
720
704
720
720
Example 2
Hex
10
01
C5
09
40
01
PAL/NTSC/SECAM video decoder
240 720
288 768
240 352
288 200
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Dec
-
-
-
-
-
-
Output
window
Example 3
Hex
10
00
A0
10
45
01
240 prsc = 1;
288 prsc = 1;
288 prsc = 2;
80
SAA7114
Dec
-
-
-
-
-
-
Scale ratios
fisc = 1; vsc = 1
fisc = 0.91667;
vsc = 1
fisc = 1.022;
vsc = 0.8333
prsc = 2;
fisc = 1.8;
vsc = 3.6
Example 4
Hex
10
00
A0
10
45
01
123 of 144
Dec
-
-
-
-
-
-