PCA9675PW,112 NXP Semiconductors, PCA9675PW,112 Datasheet

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PCA9675PW,112

Manufacturer Part Number
PCA9675PW,112
Description
IC I/O EXPANDER I2C 16B 24TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9675PW,112

Interface
I²C
Number Of I /o
16
Interrupt Output
Yes
Frequency - Clock
1MHz
Voltage - Supply
2.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Includes
POR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4248-5
935280667112
PCA9675PW
1. General description
2. Features
The PCA9675 provides general purpose remote I/O expansion for most microcontroller
families via the two-line bidirectional bus (I
family.
The PCA9675 is a drop in upgrade for the PCF8575 providing higher Fast-mode Plus
(Fm+) I
dimming of LEDs, higher I
can be on the bus without the need for bus buffers, higher total package sink capacity
(400 mA versus 100 mA) that supports having all 25 mA LEDs on at the same time and
more device addresses (64 versus 8) are available to allow many more devices on the bus
without address conflicts.
The device consists of a 16-bit quasi-bidirectional port and an I
PCA9675 has a low current consumption and includes latched outputs with high current
drive capability for directly driving LEDs.
It also possesses an interrupt line (INT) which can be connected to the interrupt logic of
the microcontroller. By sending an interrupt signal on this line, the remote I/O can inform
the microcontroller if there is incoming data on its ports without having to communicate via
the I
the I/Os as inputs.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
PCA9675
Remote 16-bit I/O expander for Fm+ I
Rev. 01 — 1 February 2007
1 MHz I
Compliant with the I
SDA with 30 mA sink capability for 4000 pF buses
2.3 V to 5.5 V operation with 5.5 V tolerant I/Os
16-bit remote I/O pins that default to inputs at power-up
Latched outputs with 25 mA sink capability for directly driving LEDs
Total package sink capability of 400 mA
Active LOW open-drain interrupt output
64 programmable slave addresses using 3 address pins
Readable device ID (manufacturer, device type, and revision)
Low standby current
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA
2
40 C to +85 C operation
C-bus. The internal Power-On Reset (POR) or software reset sequence initializes
2
C-bus speeds (1 MHz versus 400 kHz) so that the output can support PWM
2
C-bus interface
2
C-bus Fast and Standard modes
2
C-bus drive (30 mA versus 3 mA) so that many more devices
2
C-bus) and is a part of the Fast-mode Plus
2
C-bus with interrupt
2
C-bus interface. The
Product data sheet

Related parts for PCA9675PW,112

PCA9675PW,112 Summary of contents

Page 1

PCA9675 Remote 16-bit I/O expander for Fm+ I Rev. 01 — 1 February 2007 1. General description The PCA9675 provides general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I family. The PCA9675 is a ...

Page 2

... NXP Semiconductors I Packages offered: SO24, SSOP24, QSOP24, TSSOP24, HVQFN24, DHVQFN24 3. Applications I LED signs and displays I Servers I Industrial control I PLCs I Cellular telephones I Gaming machines I Instrumentation and test measurement 4. Ordering information Table 1. Ordering information Type number Topside Package mark Name PCA9675D PCA9675D SO24 ...

Page 3

... NXP Semiconductors 5. Block diagram INT AD0 AD1 AD2 SCL SDA Fig 1. Block diagram of PCA9675 data from Shift Register data to Shift Register Fig 2. Simplified schematic diagram of P00 to P17 PCA9675_1 Product data sheet Remote 16-bit I/O expander for Fm+ I PCA9675 INTERRUPT LOGIC ...

Page 4

... NXP Semiconductors 6. Pinning information 6.1 Pinning INT AD1 AD2 P00 P01 P02 P03 P04 P05 P06 P07 V Fig 3. Pin configuration for SO24 Fig 5. Pin configuration for SSOP24 PCA9675_1 Product data sheet Remote 16-bit I/O expander for Fm SDA 3 22 SCL ...

Page 5

... NXP Semiconductors terminal 1 index area Fig 7. Pin configuration for HVQFN24 6.2 Pin description Table 2. Symbol INT AD1 AD2 P00 P01 P02 P03 P04 P05 P06 P07 V SS P10 P11 P12 P13 P14 P15 P16 P17 AD0 PCA9675_1 Product data sheet ...

Page 6

... NXP Semiconductors Table 2. Symbol SCL SDA V DD [1] HVQFN and DHVQFN package die supply ground is connected to both the V pad. The V electrical, and board-level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board, and for proper heat conduction through the board thermal vias need to be incorporated in the PCB in the thermal pad region ...

Page 7

... NXP Semiconductors 7.1.1 Address maps Table 3. AD2 PCA9675_1 Product data sheet Remote 16-bit I/O expander for Fm+ I PCA9675 address map AD1 AD0 SCL SCL SDA SDA SCL SCL SDA SDA SCL SCL SCL SDA SDA SCL SDA SDA SCL SCL SCL ...

Page 8

... NXP Semiconductors Table 3. AD2 SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA PCA9675_1 Product data sheet Remote 16-bit I/O expander for Fm+ I PCA9675 address map … ...

Page 9

... NXP Semiconductors 7.2 Software Reset call, and Device ID addresses Two other different addresses can be sent to the PCA9675. • General Call address: allows to reset the PCA9675 through the I reception of the right I information. • Device ID address: allows to read ID information from the device (manufacturer, part identifi ...

Page 10

... The Device ID field is a 3-byte read-only (24 bits) word giving the following information: • 8 bits with the manufacturer name, unique per manufacturer (for example, NXP Semiconductors). • 13 bits with the part identification, assigned by manufacturer, the 7 MSBs with the category ID and the 6 LSBs with the feature ID (for example, PCA9675 16-bit quasi-output I/O expander). • ...

Page 11

... NXP Semiconductors Remark: The reading of the Device ID can be stopped anytime by sending a NACK command. Remark: If the master continues to ACK the bytes after the third byte, the PCA9675 rolls back to the first byte and keeps sending the Device ID sequence until a NACK has been detected. ...

Page 12

... NXP Semiconductors 8. I/O programming 8.1 Quasi-bidirectional I/O architecture The PCA9675’s 16 ports (see as input or output ports. Input data is transferred from the ports to the microcontroller in the Read mode (see (see Figure Every data transmission from the PCA9675 must consist of an even number of bytes, the fi ...

Page 13

... NXP Semiconductors SCL slave address SDA START condition write to port data output from port P05 output voltage P05 pull-up output current P16 output voltage P16 pull-up output current INT Fig 16. Write mode (output) 8.3 Reading from a port (Input mode) All ports programmed as input should be set to logic 1. To read, the master (microcontroller) fi ...

Page 14

SCL P0x SDA DATA 00 START condition R/W acknowledge from slave read from port 0 data into port 0 DATA 00 ...

Page 15

SCL P0x SDA DATA 00 START condition R/W acknowledge from slave read from port 0 t h(D) data into port 0 ...

Page 16

... NXP Semiconductors 8.4 Power-on reset When power is applied reset condition until V and the PCA9675 registers and I states. Thereafter V 8.5 Interrupt output (INT) The PCA9675 provides an open-drain interrupt (INT) which can be fed to a corresponding input of the microcontroller (see chips a kind of master function which can initiate an action elsewhere in the system. ...

Page 17

... NXP Semiconductors 9. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device ...

Page 18

... NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 22. System configuration 9.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse ...

Page 19

... NXP Semiconductors 10. Application design-in information 10.1 Bidirectional I/O expander applications In the 8-bit I/O expander application shown in to P07 are outputs. When used in this configuration, during a write, the input (P00 and P01) must be written as HIGH so the external devices fully control the input ports. The desired HIGH or LOW logic levels may be written to the I/Os used as outputs (P02 to P07) ...

Page 20

... NXP Semiconductors 10.3 Differences between the PCA9675 and the PCF8575 The PCA9675 is a drop in replacement for the PCF8575 and can used without electrical or software modifications, but there is a difference in interrupt output release timing during the read operation. Write operations are identical. At the completion of each 8-bit write sequence the data is stored in its associated 8-bit write register at ACK or NACK. The fi ...

Page 21

... NXP Semiconductors 12. Static characteristics Table 5. Static characteristics Symbol Parameter Supplies V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level output current OL I leakage current ...

Page 22

... NXP Semiconductors 13. Dynamic characteristics Table 6. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between a BUF STOP and START condition t hold time (repeated) START HD;STA condition t set-up time for a repeated SU;STA START condition t set-up time for STOP SU;STO ...

Page 23

... NXP Semiconductors START protocol condition (S) t SU;STA SCL t BUF SDA t HD;STA Rise and fall times refer Fig 26. I C-bus timing diagram PCA9675_1 Product data sheet Remote 16-bit I/O expander for Fm+ I bit 7 bit 6 MSB (A6) (A7 LOW HIGH 1 /f SCL SU;DAT HD;DAT and V ...

Page 24

... NXP Semiconductors 14. Package outline SO24: plastic small outline package; 24 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 25

... NXP Semiconductors SSOP24: plastic shrink small outline package; 24 leads; body width 5 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION IEC SOT340-1 Fig 28. Package outline SOT340-1 (SSOP24) ...

Page 26

... NXP Semiconductors SSOP24: plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635 DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) A UNIT max. 0.25 1.55 mm 1.73 0.25 0.10 1.40 0.0098 0.061 inches 0.068 0.01 0.0040 0.055 Note 1 ...

Page 27

... NXP Semiconductors TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 28

... NXP Semiconductors DHVQFN24: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 29

... NXP Semiconductors HVQFN24: plastic thermal enhanced very thin quad flat package; no leads; 24 terminals; body 0.85 mm terminal 1 index area terminal 1 24 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 30

... NXP Semiconductors 15. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe you must take normal precautions appropriate to handling integrated circuits. 16. Soldering This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” ...

Page 31

... NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 16.4 Reflow soldering Key characteristics in reflow soldering are: • ...

Page 32

... NXP Semiconductors Fig 33. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 17. Abbreviations Table 9. Acronym CDM CMOS ESD GPIO HBM LED ID LSB MM MSB PLC RAID 18. Revision history Table 10 ...

Page 33

... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...

Page 34

... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Functional description . . . . . . . . . . . . . . . . . . . 6 7.1 Device address . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.1.1 Address maps 7.2 Software Reset call, and Device ID addresses 7.2.1 Software Reset . . . . . . . . . . . . . . . . . . . . . . . . . 9 7.2.2 Device ID (PCA9675 ID fi ...

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