MCIMX534AVV8C Freescale Semiconductor, MCIMX534AVV8C Datasheet - Page 41

• Manufacturer Part Number: MCIMX534AVV8C
• Description: IC, 32-BIT MPU, 800 MHz, 529-BGA
• Manufacturer: Freescale Semiconductor
• Series: ARM Cortex-A8r

Specifications of MCIMX534AVV8C

• Core Size: 32bit
• Program Memory Size: 288KB
• Cpu Speed: 800MHz
• Digital Ic Case Style: BGA
• No. Of Pins: 529
• Supply Voltage Range: 0.8V To 1.15V
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Table 23
Table 24
Freescale Semiconductor
1
2
3
2
3
4
AC input logic high
AC input logic low
AC differential input high voltage
AC differential input low voltage
Input AC differential cross point voltage
Over/undershoot peak
Over/undershoot area (above OVDD
or below OVSS)
Single output slew rate
Skew between pad rise/fall asymmetry +
skew caused by SSN
AC input logic high
AC input logic low
AC differential input voltage
Input AC differential cross point voltage
Note that the JEDEC LPDDR2 specification (JESD209_2B) supersedes any specification in this document.
Vid(ac) specifies the input differential voltage |Vtr – Vcp| required for switching, where Vtr is the “true” input signal and Vcp is
the “complementary” input signal. The Minimum value is equal to Vih(ac) – Vil(ac).
The typical value of Vix(ac) is expected to be about 0.5 * OVDD. and Vix(ac) is expected to track variation of OVDD. Vix(ac)
indicates the voltage at which differential input signal must cross.
Vid(ac) specifies the input differential voltage |Vtr – Vcp| required for switching, where Vtr is the “true” input signal and Vcp is
the “complementary” input signal. The Minimum value is equal to Vih(ac) – Vil(ac).
The typical value of Vix(ac) is expected to be about 0.5 * OVDD. and Vix(ac) is expected to track variation of OVDD. Vix(ac)
indicates the voltage at which differential input signal must cross.
The typical value of Vox(ac) is expected to be about 0.5 * OVDD and Vox(ac) is expected to track variation in OVDD. Vox(ac)
indicates the voltage at which differential output signal must cross.
shows the AC parameters for LPDDR2 I/O operating in LPDDR2 mode.
shows the AC parameters for LPDDR2 I/O operating in DDR3 mode.
Parameter
Parameter
i.MX53xA Automotive and Infotainment Applications Processors, Rev. 3
2
Table 23. LPDDR2 I/O LPDDR2 mode AC Characteristics
Table 24. LPDDR2 I/O DDR3 mode AC Characteristics
2
3
3
Vidh(ac)
Symbol
Vidl(ac)
Vih(ac)
Vix(ac)
Vil(ac)
Vpeak
Varea
Symbol Test Condition
t
Vih(ac)
Vid(ac)
Vix(ac)
SKD
Vil(ac)
tsr
impedance= 60Ohm
Relative to OVDD/2
Drive impedance=
Test Condition
50Ohm to Vref.
50Ohm to Vref.
40Ohm +-30%
5pF load.Drive
clk=266MHz
clk=400MHz
5pF load.
266MHz
+-30%
—
—
—
—
—
—
—
—
—
Vref + 0.175
Vref
0.35
Min
Vref + 0.22
–
0
0.15
-0.12
0.44
Min
1.5
—
—
—
—
0
1
Typ
—
—
—
—
1
1
Typ
—
—
—
—
—
—
—
—
—
—
Electrical Characteristics
Vref
Vref + 0.15
OVDD
Max
Vref – 0.22
–
—
0.175
OVDD
Max
0.44
0.12
0.35
0.2
0.1
0.6
3.5
2.5
—
Unit
V
V
V
V
V*ns
V/ns
Unit
ns
V
V
V
V
V
V
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