PCA9556PW,112 NXP Semiconductors, PCA9556PW,112 Datasheet - Page 2

IC I/O EXPANDER I2C 8B 16TSSOP

PCA9556PW,112

Manufacturer Part Number
PCA9556PW,112
Description
IC I/O EXPANDER I2C 8B 16TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9556PW,112

Package / Case
16-TSSOP
Interface
I²C, SMBus
Number Of I /o
8
Interrupt Output
Yes
Frequency - Clock
100KHz
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Includes
POR
Logic Family
PCA9556
Number Of Lines (input / Output)
8.0 / 8.0
Operating Supply Voltage
3 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Logic Type
I2C, SMBus
Mounting Style
SMD/SMT
Number Of Input Lines
8.0
Number Of Output Lines
8.0
Output Current
20 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1059-5
935262899112
PCA9556PW
Philips Semiconductors
FEATURES
DESCRIPTION
The PCA9556 is a silicon CMOS circuit which provides parallel
input/output expansion for SMBus applications. The PCA9556
consists of an 8-bit input port register, 8-bit output port register, and
an SMBus interface. It has low current consumption and a high
impedance open drain output pin, I/O0.
The SMBus system master can reset the PCA9556 in the event of a
timeout by asserting a LOW on the reset input. The SMBus system
master can also invert the PCA9556 inputs by writing to the active
HIGH polarity inversion bits. Finally, the system master can enable
the PCA9556’s I/Os as either inputs or outputs by writing to the
configuration register.
ORDERING INFORMATION
Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I
I
2
2002 Mar 28
C is a trademark of Philips Semiconductors Corporation.
SMBus compliance with fixed 3.3V voltage levels
Operating power supply voltage range of 3.0 V – 5.5 V
Active high polarity inverter register
Each I/O is configurable as an input or output
Active low reset pin
Low leakage current on power-down
Noise filter on SCL/SDA inputs
No glitch on power-up
Internal power-on reset
8 I/O pins which default to 8 inputs
High impedance open drain on I/O0
ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
Latch-up testing is done to JESDEC Standard JESD78 which
exceeds 100 mA
Octal SMBus and I
16-Pin Plastic TSSOP
PACKAGES
2
C registered interface
TEMPERATURE RANGE
–40 to +85 C
2
The power-on reset puts the registers in their default state and
initializes the SMBus state machine. The RESET pin causes the
same reset/initialization to occur without depowering the part.
The PCA9557 8-bit I
performance pin-for-pin replacement for the PCA9556.
PIN CONFIGURATION
PIN DESCRIPTION
NUMBER
9–14
PIN
15
16
1
2
3
4
5
6
7
8
ORDER CODE
PCA9556PW
I/O2–I/O7
SYMBOL
SDA
Figure 1. Pin configuration
SCL
I/O0
I/O1
V
RESET
2
A0
A1
A2
SS
C SMBus I/O port with reset is the higher
SDA
SCL
I/O0
I/O1
V
V
A0
A1
A2
DD
SS
2
1
2
3
4
5
6
7
8
C patent.
Serial clock line
Serial data line
Address input 0
Address input 1
Address input 2
I/O0 (open drain)
I/O1
Supply GROUND
I/O2 to I/O7
External reset (active LOW)
Supply voltage
16
15
14
13
12
11
10
9
DRAWING NUMBER
V
RESET
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
DD
FUNCTION
SOT403-1
PCA9556
853-2138 27929
Product data
su01045

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