CS82C55A96 Intersil, CS82C55A96 Datasheet - Page 9

IC I/O EXPANDER 24B 44PLCC

CS82C55A96

Manufacturer Part Number
CS82C55A96
Description
IC I/O EXPANDER 24B 44PLCC
Manufacturer
Intersil
Datasheet

Specifications of CS82C55A96

Interface
Programmable
Number Of I /o
24
Interrupt Output
No
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Frequency - Clock
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS82C55A96
Manufacturer:
Intersil
Quantity:
10 000
Mode 0 Configurations
CONTROL WORD #12
CONTROL WORD #13
Operating Modes
Mode 1 - (Strobed Input/Output). This functional
configuration provides a means for transferring I/O data to or
from a specified port in conjunction with strobes or “hand
shaking” signals. In mode 1, port A and port B use the lines
on port C to generate or accept these “hand shaking”
signals.
Mode 1 Basic Function Definitions:
• Two Groups (Group A and Group B)
• Each group contains one 8-bit port and one 4-bit
• The 8-bit data port can be either input or output. Both
• The 4-bit port is used for control and status of the 8-bit port.
Input Control Signal Definition
(Figures 6 and 7)
STB (Strobe Input)
A “low” on this input loads data into the input latch.
IBF (Input Buffer Full F/F)
A “high” on this output indicates that the data has been
loaded into the input latch: in essence, an acknowledgment.
IBF is set by STB input being low and is reset by the rising
edge of the RD input.
control/data port
inputs and outputs are latched.
D7 - D0
D7 - D0
D7
D7
1
1
D6
D6
0
0
D5
D5
0
0
D4
D4
1
1
D3
D3
1
1
D2
D2
0
0
82C55A
82C55A
D1
D1
(Continued)
0
0
9
C
C
D0
D0
0
1
A
B
A
B
8
4
4
8
8
4
4
8
PC7 - PC4
PC3 - PC0
PB7 - PB0
PC7 - PC4
PC3 - PC0
PB7 - PB0
PA7 - PA0
PA7 - PA0
82C55A
CONTROL WORD #14
CONTROL WORD #15
CONTROL WORD
D7
CONTROL WORD
D7 D6 D5 D4 D3 D2 D1 D0
1
1
D6
0
D7 - D0
D7 - D0
D7
D7
1
1
D5
1
D6
D6
0
0
D4
1
D5
D5
0
0
1/0
D3 D2 D1 D0
D4
D4
FIGURE 6. MODE 1 INPUT
1
1
1
D3
D3
1
1
PC6, PC7
1 = INPUT
0 = OUTPUT
1
RD
RD
D2
D2
0
0
82C55A
82C55A
D1
D1
1
1
C
C
D0
D0
0
1
A
B
A
B
MODE 1 (PORT A)
MODE 1 (PORT B)
INTE
INTE
A
B
8
4
4
8
8
4
4
8
PC6, PC7
PB7-PB0
PA7-PA0
PC4
PC5
PC3
PC2
PC1
PC0
PA7 - PA0
PC7 - PC4
PC3 - PC0
PB7 - PB0
PA7 - PA0
PC7 - PC4
PC3 - PC0
PB7 - PB0
November 16, 2006
2
FN2969.10
8
8
STBA
IBFA
INTRA
STBB
IBFB
INTRB
I/O

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