DS1876T+T&R Maxim Integrated Products, DS1876T+T&R Datasheet
DS1876T+T&R
Specifications of DS1876T+T&R
Related parts for DS1876T+T&R
DS1876T+T&R Summary of contents
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... DS1876T+T&R -40NC to +95NC +Denotes a lead(Pb)-free/RoHS-compliant package. T&R = Tape and reel. *EP = Exposed pad. _______________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. Meets All SFF-8472 Transmitter Control and S Monitoring Requirements ...
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SFP Controller with Dual LDD Interface Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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SFP Controller with Dual LDD Interface TABLE OF CONTENTS (continued) Memory Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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SFP Controller with Dual LDD Interface Figure 1. Power-Up Timing ...
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SFP Controller with Dual LDD Interface ABSOLUTE MAXIMUM RATINGS Voltage Range on PMON_, BMON_, RSEL, IN1, TXF_, and TXD_ Pins Relative to Ground ............................... -0. Voltage Range SDA, SCL, CC OUT1, RSELOUT, and TXFOUT Pins ...
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SFP Controller with Dual LDD Interface MOD_, APC_ ELECTRICAL CHARACTERISTICS (V = +2.85V to +3.9V -40NC to +95NC, unless otherwise noted PARAMETER SYMBOL Main Oscillator Frequency Delta-Sigma Input-Clock Frequency Reference Voltage Input (REFIN) V Output Range ...
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SFP Controller with Dual LDD Interface DIGITAL THERMOMETER CHARACTERISTICS (V = +2.85V to +3.9V -40NC to +95NC, unless otherwise noted PARAMETER SYMBOL Thermometer Error AC ELECTRICAL CHARACTERISTICS (V = +2.85V to +3.9V -40NC to ...
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SFP Controller with Dual LDD Interface NONVOLATILE MEMORY CHARACTERISTICS (V = +2.85V to +3.9V, unless otherwise noted.) CC PARAMETER EEPROM Write Cycles Note 1: All voltages are referenced to ground. Current into the IC is positive, and current out of ...
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SFP Controller with Dual LDD Interface (V = 3.3V +25°C, unless otherwise noted SUPPLY CURRENT vs. SUPPLY VOLTAGE 2.7 SDA = SCL = V CC DACs AT 1FFh 2.6 2.5 2.4 2.3 +25°C 2.2 2.1 2.0 ...
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SFP Controller with Dual LDD Interface TOP VIEW *EXPOSED PAD. PIN NAME 1 RSELOUT Rate-Select Output 2 2 SCL I C Serial-Clock Input 2 3 SDA I C Serial-Data Input/Output Transmit Fault Output, Open 4 TXFOUT Drain 5 TXF1 Transmit ...
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SFP Controller with Dual LDD Interface SDA INTERFACE SCL EEPROM 256 BYTES AT A0h V CC BMON1 PMON1 BMON2 PMON2 TEMPERATURE SENSOR TXD1 TXD2 TXF1 TXF2 RSEL LOGIC CONTROL IN1 ______________________________________________________________________________________ MOD2 DAC ...
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SFP Controller with Dual LDD Interface TOSA2 TOSA1 RC FILTERS (FIGURE Detailed Description The DS1876 integrates the control and monitoring func- tionality required in a dual transmitter system. Key com- ponents of ...
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SFP Controller with Dual LDD Interface Table 1. Acronyms ACRONYM DESCRIPTION ADC Analog-to-Digital Converter AGC Automatic Gain Control APC Automatic Power Control APD Avalanche Photodiode ATB Alarm Trap Bytes DAC Digital-to-Analog Converter LOS Loss of Signal LUT Lookup Table NV ...
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SFP Controller with Dual LDD Interface QUICK-TRIP SAMPLE TIMES Figure 3. Quick-Trip Sample Timing Table 2. ADC Default Monitor Full-Scale Ranges SIGNAL (UNITS) Temperature (NC) V (V) CC PMON1, PMON2 and BMON1, BMON2 (V) corresponding alarms and warnings (TXP HI1, ...
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SFP Controller with Dual LDD Interface The ADC results (after right-shifting, if used) are com- pared to the alarm and warning thresholds after each conversion, and the corresponding alarms are set that can be used to trigger the TXFOUT output. ...
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SFP Controller with Dual LDD Interface SEE RECALL V POA POD PRECHARGED SEE RECALLED VALUE TO 0 Figure 5. Low-Voltage Hysteresis Example 3.24k Ω 3.24k Ω DAC 0.01µF DS1876 1k Ω 1k Ω DAC 0.1µF DS1876 Figure ...
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SFP Controller with Dual LDD Interface Figure 7. 3-Bit (8-Position) Delta-Sigma Example DAC OFFSET LUTs (04h/06h)[A2h/B2h] EIGHT REGISTERS PER DAC EACH OFFSET REGISTER CAN BE INDEPENDENTLY 1023 SET BETWEEN 0 AND 1020. ...
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SFP Controller with Dual LDD Interface V CC TXDS_ R PU TXD_ TXDC_ TXP_ HI FLAG TXP HI ENABLE HBAL_ FLAG HBAL ENABLE QTHEXT_ TXP_ LO FLAG TXP LO ENABLE FAULT RESET TIMER (130ms) TXD (t ) EXT INITR1 OUT ...
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SFP Controller with Dual LDD Interface DETECTION OF TXFOUT FAULT TXFOUT Figure 11a. TXFOUT Nonlatched Operation DETECTION OF TXFOUT FAULT TXD_ OR TXFOUT RESET TXFOUT Figure 11b. TXFOUT Latched Operation Transmit Fault (TXFOUT) Output TXFOUT can be triggered by all ...
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SFP Controller with Dual LDD Interface of SCL during a bit read. The device shifts out each bit of data on SDA at the falling edge of the previous SCL pulse and the data bit is valid at the rising ...
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SFP Controller with Dual LDD Interface always the second byte transmitted during a write operation following the slave address byte. 2 See Figure 13 for an example timing. Writing a Single Byte to a Slave: The master ...
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SFP Controller with Dual LDD Interface EEPROM Write Cycles: When EEPROM writes occur, the DS1876 writes the whole EEPROM memory page, even if only a single byte on the page was modified. Writes that do not modify all 8 bytes ...
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SFP Controller with Dual LDD Interface ADDRESS A0h I C ADDRESS A2h/B2h 00h 00h LOWER MEMORY PASSWORD ENTRY (PWE) (4 BYTES) TABLE-SELECT BYTE EEPROM (256 BYTES) 80h TABLE 01h (A2h ONLY) EEPROM (120 BYTES) F8h ALARM- ...
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SFP Controller with Dual LDD Interface Register Descriptions The register maps show each byte/word (2 bytes) in terms of its row in the memory. The first byte in the row is located in memory at the row address (hexadecimal) in ...
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SFP Controller with Dual LDD Interface WORD 0 ROW ROW NAME (HEX) BYTE 0/8 <1/C> 00 THRESHOLD 0 TEMP ALARM HI <1/C > 08 THRESHOLD ALARM HI <1/D> 10 THRESHOLD 2 BMON ALARM HI <1/D> 18 THRESHOLD ...
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SFP Controller with Dual LDD Interface WORD 0 ROW ROW NAME (HEX) BYTE 0/8 <0/C> <8/C> 80 CONFIG 0 MODE <8/C> 88 CONFIG 1 CNFGA <8/C> 90 SCALE 0 RESERVED <8/C> 98 SCALE 1 BMON2 SCALE <8/C> A0 OFFSET 0 ...
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SFP Controller with Dual LDD Interface WORD 0 ROW ROW NAME (HEX) BYTE 0/8 80–F7 EMPTY EMPTY <7/M> <M> F8 ALARM ENABLE ALARM EN 3 <C> or <_/C> = Common, <D> or <_/D> = Different, <M> or <_/M> = Mixture ...
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SFP Controller with Dual LDD Interface Lower Memory, Register 00h–01h: TEMP ALARM HI Lower Memory, Register 04h–05h: TEMP WARN HI FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 6 00h, 04h 01h, ...
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SFP Controller with Dual LDD Interface Lower Memory, Register 08h–09h: V Lower Memory, Register 0Ch–0Dh: V FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 15 14 08h, 0Ch 09h, 0Dh 2 2 ...
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SFP Controller with Dual LDD Interface Lower Memory, Register 10h–11h: BMON ALARM HI Lower Memory, Register 14h–15h: BMON WARN HI Lower Memory, Register 18h–19h: PMON ALARM HI Lower Memory, Register 1Ch–1Dh: PMON WARN HI FACTORY DEFAULT READ ACCESS WRITE ACCESS ...
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SFP Controller with Dual LDD Interface Lower Memory, Register 20h–47h: EE FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 20h–47h EE EE BIT 7 PW2 level access-controlled EEPROM. Lower Memory, Register 48h–57h: EE FACTORY DEFAULT READ ...
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SFP Controller with Dual LDD Interface Lower Memory, Register 60h–61h: TEMP VALUE FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 6 60h 61h 2 2 BIT 7 Signed two’s complement direct-to-temperature measurement. ...
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SFP Controller with Dual LDD Interface Lower Memory, Register 64h–65h: BMON VALUE Lower Memory, Register 66h–67h: PMON VALUE POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 15 14 64h, 66h 65h, 67h ...
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SFP Controller with Dual LDD Interface Lower Memory, Register 6Eh: STATUS POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE Write Access N/A All <D> <D> 6Eh TXDS TXDC BIT 7 TXDS1 [A2h]: TXD1 status bit. Reflects ...
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SFP Controller with Dual LDD Interface Lower Memory, Register 6Fh: UPDATE POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE TEMP 6Fh VCC RDY RDY BIT 7 TEMP RDY, VCC RDY, BMON RDY, PMON RDY: Update of ...
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SFP Controller with Dual LDD Interface Lower Memory, Register 70h: ALARM POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 70h TEMP HI TEMP LO BIT 7 TEMP HI: High alarm status for temperature measurement. BIT 7 ...
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SFP Controller with Dual LDD Interface Lower Memory, Register 71h: ALARM POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 71h RESERVED RESERVED BIT 7 BITS 7:3 RESERVED TXFOUTS: TXFOUT status. Indicates the state the open-drain output ...
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SFP Controller with Dual LDD Interface Lower Memory, Register 73h: RESERVED POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE This register is reserved. Lower Memory, Register 74h: WARN POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND ...
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SFP Controller with Dual LDD Interface Lower Memory, Registers 75h–7Ah: RESERVED MEMORY POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE These registers are reserved. The value when read is 00h. Lower Memory, Registers 7Bh–7Eh: PASSWORD ENTRY ...
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SFP Controller with Dual LDD Interface Lower Memory, Register 7Fh: TABLE SELECT (TBL SEL) POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 7 6 7Fh 2 2 BIT 7 The upper memory tables of the DS1876 ...
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SFP Controller with Dual LDD Interface Table 01h, Register F8h: ALARM EN POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE <C> <C> F8h TEMP HI TEMP LO BIT 7 Layout is identical to ALARM Register 71h) ...
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SFP Controller with Dual LDD Interface Table 01h, Register F9h: RESERVED POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE This register is reserved. Table 01h, Register FAh: ALARM EN POWER-ON VALUE READ ACCESS WRITE ACCESS A2h ...
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SFP Controller with Dual LDD Interface Table 01h, Register FCh: WARN EN POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE <C> <C> FCh TEMP HI TEMP LO BIT 7 Layout is identical to WARN Register 71h) ...
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SFP Controller with Dual LDD Interface Table 01h, Register FDh–FFh: RESERVED POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE These registers are reserved. Table 02h, Register 80h: MODE POWER-ON VALUE READ ACCESS WRITE ACCESS A2h AND ...
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SFP Controller with Dual LDD Interface Table 02h, Register 80h: MODE (continued) MOD1EN MOD1 DAC is writable by the user and the LUT recalls are disabled. This allows the user to BIT 2 interactively test their modules by ...
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SFP Controller with Dual LDD Interface Table 02h, Register 82h–85h: RESERVED FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE These registers are reserved. Table 02h, Register 86h: DEVICE ID FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY ...
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SFP Controller with Dual LDD Interface Table 02h, Register 88h: CNFGA FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 88h QTHEXT2 QTHEXT1 BIT 7 QTHEXT2: QT high extension for transmitter Disabled. TXP HI ...
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SFP Controller with Dual LDD Interface Table 02h, Register 89h: CNFGB FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 89h IN1C INVOUT1 BIT 7 IN1C: IN1 software control bit (see Figure 10). BIT ...
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SFP Controller with Dual LDD Interface Table 02h, Register 8Ah: CNFGC FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 8Ah TXDFG2 TXDFLT2 BIT 7 TXDFG2: See Figure 9. BIT FETG2, an internal signal, ...
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SFP Controller with Dual LDD Interface Table 02h, Register 8Ch: RANGING FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 8Ch RESERVED HBIAS2 BIT 7 The upper nibble of this byte controls the full-scale range of the ...
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SFP Controller with Dual LDD Interface Table 02h, Register 8Dh: RANGING FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 8Dh RESERVED HBIAS1 BIT 7 The upper nibble of this byte controls the full-scale range of the ...
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SFP Controller with Dual LDD Interface Table 02h, Register 8Eh: RIGHT-SHIFT FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 8Eh RESERVED BMON2 2 BIT 7 Allows for right-shifting the final answer of BMON2 and PMON2 voltage ...
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SFP Controller with Dual LDD Interface Table 02h, Register 92h–93h Table 02h, Register 94h–97h: RESERVED Table 02h, RegisteR 98h–99h: BMON2 SCALE Table 02h, Register 9Ah–9Bh: PMON2 SCALE Table 02h, Register 9Ch–9Dh: BMON1 SCALE Table 02h, Register 9Eh–9Fh: PMON1 ...
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SFP Controller with Dual LDD Interface Table 02h, Register A2h–A3h Table 02h, Register A4h–A7h: RESERVED Table 02h, Register A8h–A9h: BMON2 OFFSET Table 02h, Register AAh–ABh: PMON2 OFFSET Table 02h, Register ACh–ADh: BMON1 OFFSET Table 02h, Register AEh–AFh: PMON1 ...
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SFP Controller with Dual LDD Interface Table 02h, Register B4h–B7h: PW2 FACTORY DEFAULT READ ACCESS WRITE ACCESS MEMORY TYPE 31 30 B4h B5h B6h B7h 2 2 BIT ...
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SFP Controller with Dual LDD Interface Table 02h, Register BAh: HTXP2 DAC FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 7 6 BAh 2 2 BIT 7 The digital value used for the HTXP2 reference and ...
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SFP Controller with Dual LDD Interface Table 02h, Register BDh: HBIAS1 DAC FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 7 6 BDh 2 2 BIT 7 The digital value used for the HBIAS1 reference and ...
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SFP Controller with Dual LDD Interface Table 02h, Register C0h: PW_ENA FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE C0h RESERVED RWTBL1C BIT 7 BIT 7 RESERVED RWTBL1C: Table 01h or 05h bytes F8–FFh. Table address ...
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SFP Controller with Dual LDD Interface Table 02h, Register C1h: PW_ENB FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE C1h RWTBL46 RTBL1C BIT 7 RWTBL46: Tables 04h and 06h. BIT (default) Read and ...
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SFP Controller with Dual LDD Interface Table 02h, Register C6h: POLARITY FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE C6h RESERVED RESERVED BIT 7 BITS 7:4 RESERVED MOD2P: MOD2 DAC polarity. The MOD2 DAC (Table 02h, ...
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SFP Controller with Dual LDD Interface Table 02h, Register C7h: TBLSELPON FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 7 6 C7h 2 2 BIT 7 Chooses the initial value for the TBL SEL byte (Lower ...
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SFP Controller with Dual LDD Interface Table 02h, Register CAh–CBh: APC2 DAC FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE CAh CBh 2 2 BIT 7 The digital value used for APC2 ...
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SFP Controller with Dual LDD Interface Table 02h, Register CEh–CFh: APC1 DAC FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE CEh CFh 2 2 BIT 7 The digital value used for APC1 ...
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SFP Controller with Dual LDD Interface Table 04h, Register 80h–C7h: MODULATION LUT (MOD) FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 7 6 80h–C7h 2 2 BIT 7 Digital value for the MOD1 DAC (A2h address) ...
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SFP Controller with Dual LDD Interface Table 04h, Register F8h–FFh: MOD OFFSET LUT FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 9 F8h–FFh 2 2 BIT 7 The digital value for the temperature offset of the ...
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SFP Controller with Dual LDD Interface Table 06h, Register C8h–DFh: EMPTY FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE These registers do not exist. Table 06h, Register E0h–E7h: HBATH LUT FACTORY DEFAULT READ ACCESS WRITE ACCESS ...
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SFP Controller with Dual LDD Interface Table 06h, Register E8h–EFh: HTXP LUT FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 7 E8h–EFh 2 2 BIT 7 The HTXP LUT is used to temperature compensate the transmit ...
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SFP Controller with Dual LDD Interface Table 06h, Register F8h–FFh: APC OFFSET LUT FACTORY DEFAULT READ ACCESS WRITE ACCESS A2h AND B2h MEMORY MEMORY TYPE 9 F8h–FFh 2 2 BIT 7 The digital value for the temperature offset of the ...
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