DS1876T+T&R Maxim Integrated Products, DS1876T+T&R Datasheet - Page 17

• Manufacturer Part Number: DS1876T+T&R
• Description: IC CTRLR SFP DUAL LDD 28TQFN
• Manufacturer: Maxim Integrated Products
• Type: SFP Laser Controllerr

Specifications of DS1876T+T&R

• Input Type: Logic
• Output Type: Logic
• Interface: I²C
• Current - Supply: 10mA
• Mounting Type: Surface Mount
• Package / Case: 28-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

When temperature controlled, the DACs are updated
after each temperature conversion.
The reference input, REFIN, is the supply voltage for the
output buffer of all four DACs. The voltage connected to
Figure 7. 3-Bit (8-Position) Delta-Sigma Example
Figure 8. DAC OFFSET LUTs
1023
767
511
255
0
O
1
2
3
4
5
6
7
-40°C
EACH OFFSET REGISTER CAN BE INDEPENDENTLY
SET BETWEEN 0 AND 1020. 1020 = 4 x FFh. THIS
EXAMPLE ILLUSTRATES POSITIVE TEMPCO.
BITS
DAC
F8h
LUT
7:0
-8°C
DAC OFFSET LUTs (04h/06h)[A2h/B2h]
______________________________________________________________________________________
DAC
BITS
LUT
F9h
7:0
SFP Controller with Dual LDD Interface
EIGHT REGISTERS PER DAC
+8°C
DAC
BITS
FAh
LUT
7:0
+24°C +40°C +56°C +70°C +88°C +104°C
DAC
BITS
LUT
FBh
7:0
DAC
BITS
FCh
LUT
7:0
BITS
DAC
FDh
LUT
7:0
DAC
BITS
FEh
LUT
7:0
DAC
BITS
LUT
FFh
7:0
REFIN and its decoupling must be able to support the
edge rate requirements of the delta-sigma outputs. In
a typical application, a 0.1FF capacitor should be con-
nected between REFIN and ground.
1023
767
511
255
0
-40°C
EACH OFFSET REGISTER CAN BE INDEPENDENTLY SET BETWEEN
0 AND 1020. 1020 = 4 x FFh. THIS EXAMPLE ILLUSTRATES POSITIVE
AND NEGATVE TEMPCO.
DAC
BITS
LUT
F8h
7:0
-8°C
DAC OFFSET LUTs (04h/06h)[A2h/B2h]
BITS
DAC
F9h
LUT
7:0
EIGHT REGISTERS PER DAC
+8°C
BITS
DAC
FAh
LUT
7:0
+24°C +40°C +56°C +70°C +88°C +104°C
DAC
BITS
FBh
LUT
7:0
DAC
BITS
FCh
LUT
7:0
DAC
BITS
FDh
LUT
7:0
BITS
DAC
LUT
FEh
7:0
BITS
DAC
FFh
LUT
7:0
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