DS1876T+T&R Maxim Integrated Products, DS1876T+T&R Datasheet - Page 44

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DS1876T+T&R

Manufacturer Part Number
DS1876T+T&R
Description
IC CTRLR SFP DUAL LDD 28TQFN
Manufacturer
Maxim Integrated Products
Type
SFP Laser Controllerr
Datasheet

Specifications of DS1876T+T&R

Input Type
Logic
Output Type
Logic
Interface
I²C
Current - Supply
10mA
Mounting Type
Surface Mount
Package / Case
28-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SFP Controller with Dual LDD Interface
Table 01h, Register FDh–FFh: RESERVED
Table 02h, Register 80h: MODE
44
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80h
POWER-ON VALUE
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
POWER-ON VALUE
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
These registers are reserved.
SEEB
BIT 7
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
SEEB:
0 = (default) Enables EEPROM writes to SEE bytes.
1 = Disables EEPROM writes to SEE bytes during configuration, so that the configuration of the
part is not delayed by the EE cycle time. Once the values are known, write this bit to a 0 and write
the SEE locations again for data to be written to the EEPROM.
MOD2EN:
0 = MOD2 DAC is writable by the user and the LUT recalls are disabled. This allows the user to
interactively test their modules by writing the values for MOD2. The output is updated with the new
value at the end of the write cycle. The I
1 = (default) Enables automatic control of the LUT for MOD2 DAC.
QT2EN:
0 = QTs (HBIAS, TXP HI, TXP LO) for transmitter 2 are writable by the user and the LUT recalls are
disabled. This allows the user to interactively test their modules by writing to the QT thresholds.
The thresholds are updated with the new values at the end of the write cycle. The I
condition is the end of the write cycle.
1 = (default) Enables automatic control of the LUT QTs for transmitter 2.
APC2EN:
0 = APC2 DAC is writable by the user and the LUT recalls are disabled. This allows the user to
interactively test their modules by writing the values for APC2. The output is updated with the new
value at the end of the write cycle. The I
1 = (default) Enables automatic control of the LUT for APC2 DAC.
AEN:
0 = The temperature-calculated index value TINDEX is writable by the user and the updates
of calculated indexes are disabled. This allows the user to interactively test their modules by
controlling the indexing for the LUTs. The recalled values from the LUTs appear in the DAC
registers after the next completion of a temperature conversion.
1 = (default) The temperature-calculated index value TINDEX is used to control the LUTs.
MOD2EN
N/A
N/A
N/A
N/A
7Fh
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
PW2 or (PW1 and RWTBL2)
Common A2h and B2h memory location
Volatile
QT2EN
APC2EN
2
2
C STOP condition is the end of the write cycle.
C STOP condition is the end of the write cycle.
AEN
Table 02h Register Descriptions
MOD1EN
QT1EN
2
C STOP
APC1EN
BIT 0

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