DS32ELX0421SQX/NOPB National Semiconductor, DS32ELX0421SQX/NOPB Datasheet - Page 8

• Manufacturer Part Number: DS32ELX0421SQX/NOPB
• Description: IC SERIALIZER 312.5GBPS 48LLP
• Manufacturer: National Semiconductor

Specifications of DS32ELX0421SQX/NOPB

• Function: Serializer
• Data Rate: 3.125Gbps
• Input Type: LVDS
• Output Type: CML
• Number Of Inputs: 5
• Number Of Outputs: 2
• Voltage - Supply: 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LLP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DS32ELX0421SQX

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V
V
V
V
R
f
t
t
t
t
t
t
t
t
R
ΔR
V
LR
t
t
t
t
t
Symbol
Symbol
Symbol
Symbol
CIP
CIT
XIT
CIH
CIL
STC
HTC
LVDLS
OS
R
F
RFMM
DE
TH
TL
LVCM
LVOS
OD
LVIN
OT
LVDS Electrical Specifications
Over recommended operating supply and temperature ranges unless otherwise specified.
LVDS Timing Specifications
Over recommended operating supply and temperature ranges unless otherwise specified.
CML Electrical Specifications
Over recommended operating supply and temperature ranges unless otherwise specified.
CML Timing Specifications
Over recommended operating supply and temperature ranges unless otherwise specified.
OT
Differential Input High Threshold
Differential Input Low Threshold
LVDS Input Common Mode Voltage
LVDS Input Loss of Signal
Input Impedance
Input DDR Clock (TxCLKIN) Frequency Range
TxCLKIN Period
TxCLKIN Transition Time
TxIN Transition Time
TxCLKIN High Time
TxCLKIN Low Time
TxIN Setup to TxCLKIN
TxIN Hold to TxCLKIN
LVDS Input Clock Delay Step Size
Output Terminations
Mismatch in Output Termination Resistors
Output Differential Voltage Swing
Line Rate
Output Overshoot
Differential Low to High Transition Time
Differential High to Low Transition Time
Mismatch in Rise/Fall Time
De-emphasis width
Parameter
Parameter
Parameter
Parameter
0.05V < V
LVDS input loss of signal level.
(Note
Internal LVDS input termination
between differential pairs.
See
See
(Note
See
Programmable through the SMBus,
register 30'h
Default setting = 011'b [7:5]
See
On chip termination from TxOUT0/1
+ and TxOUT0/1 - to V
50Ω mode
75Ω mode
Based on VOD_CTRL = 9.1 kΩ
Tested with alternating 1-0 pattern.
(Note
(Note
(Note
Measured from zero-crossing at
rising edge to 80% of VOD from zero-
crossing at falling edge. TDE is
measured at the High setting during
test.
8
Figure 3
Figure 2
Figure 3
7)
8)
8)
8)
8)
LVCM
Conditions
Conditions
Conditions
Conditions
< V
DD25
DD25
– 0.05V
(Note
(Note
(Note
(Note
3,
3,
3,
3,
Note
Note
Note
Note
1175
-100
0.05
0.15
0.7T
0.7T
-550
1.25
Min
Min
125
900
Min
Min
3.2
0.5
85
40
60
4,
5)
4,
5)
20
Note
Note
1350
Typ
Typ
Typ
Typ
100
100
1.0
2T
50
75
60
60
T
T
1
5)
5)
V
312.5
3.125
+100
1450
Max
DD25
0.05
Max
1.3T
1.3T
Max
Max
115
3.0
60
90
10
90
90
15
8
3
5
–
mV
mV
Units
Units
Units
Units
Gbps
MHz
mV
mV
ns
ns
ns
ns
ns
ps
ps
ps
ps
ps
ps
UI
%
%
V
Ω
Ω
Ω
P-P
P-P