PCA9703PW,112 NXP Semiconductors, PCA9703PW,112 Datasheet
PCA9703PW,112
Specifications of PCA9703PW,112
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PCA9703PW,112 Summary of contents
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PCA9703 18 V tolerant SPI 16-bit GPI with maskable INT Rev. 01 — 23 February 2010 1. General description The PCA9703 is a low power 18 V tolerant SPI General Purpose Input (GPI) shift register designed to monitor the status ...
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... NXP Semiconductors ESD protection exceeds 5 kV HBM per JESD22-A114, 350 V MM per AEC-Q100, and 1000 V CDM per JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Operating temperature range: −40 °C to +125 °C Offered in TSSOP24 and HWQFN24 packages 3. Applications Automotive Body control modules Electronic control units (e ...
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... NXP Semiconductors 5. Block diagram IN0 INPUT IN1 INPUT IN15 INPUT Fig 1. Block diagram of PCA9703 6. Pinning information 6.1 Pinning terminal 1 index area Fig 2. Pin configuration for HWQFN24 PCA9703_1 Product data sheet V DD PCA9703 DFF0 DFF1 DFF15 INPUT STATUS REGISTER V SS IN0 1 18 ...
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... NXP Semiconductors 6.2 Pin description Table 2. Symbol SDOUT INT INT_EN IN0 IN1 IN2 IN3 IN4 IN5 IN6 IN7 V SS IN8 IN9 IN10 IN11 IN12 IN13 IN14 IN15 CS SCLK SDIN V DD [1] HWQFN24 package die supply ground is connected to both V be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board ...
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... NXP Semiconductors 7. Functional description PCA9703 is a 16-bit General Purpose Input (GPI) with an open-drain interrupt output designed to monitor switch status. By putting an external 100 kΩ series resistor at the input port, the device allows the input to tolerate momentary double 12 V battery, reverse battery jump start load dump conditions. The interrupt output is asserted when an input port status changes, the input is not masked and the interrupt output is enabled ...
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... NXP Semiconductors Multiple PCA9703 devices can be serially connected for monitoring a large number of switches by connecting the SDOUT of one device to the SDIN of the next device. SCLK and CS must be common among all devices and interrupt outputs may be tied together. No external logic is necessary because all the devices’ interrupt outputs are open-drain that function as ‘ ...
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... NXP Semiconductors CS SCLK SDIN high-impedance SDOUT shift register input status register interrupt mask register DATA[15:0] is data on the input pins, IN[15:0]. Shaded areas indicate active but invalid data. Fig 4. Register access timing 7.1.6 Software reset operation Software reset will be activated by writing all zeroes into the shift register. This is identical to having an interrupt mask value of 0X00 ...
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... NXP Semiconductors Table 3 input status register. The interrupt output is asserted when the input port and input status register differ. Table HIGH LOW don’t care INT_EN [1] Input status register is the value or content of the D flip-flops. [2] Logic states shown for INT pin assumes 10 kΩ pull-up resistor. ...
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... NXP Semiconductors 7.4 minimum LOW threshold of 2 guaranteed for the logical switching points for the inputs. See 0.8V DD 0.55V DD Fig 5. The V IL that if the user applies 2 less to the input (with V passes this threshold, they will always see a LOW. The more to the input (with V always see a HIGH ...
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... NXP Semiconductors 8. Application design-in information 8.1 General application Fig 6. Typical application 8.2 Automotive application Supports: • battery ( • Double battery ( Reverse battery (− −16 V) • • Jump start (27 V for 60 seconds) • Load dump (40 V) PCA9703_1 Product data sheet 18 V tolerant SPI 16-bit GPI with maskable INT 4 ...
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... NXP Semiconductors 8.2.1 SBC wake port extension with cyclic biasing System Basis Chips (SBC) offer many functions needed for in-vehicle networking solutions. Some of the features built into SBC are: • Transceivers (HS-CAN, LIN 2.0) • Scalable voltage regulators • Watchdog timers; wake-up function • ...
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... NXP Semiconductors 8.2.1.2 UJA106x with PCA9703, sleep Fig 8. Very low quiescent system current (50 μA) due to disabled μC and cyclically biasing • of switches • Wake-up upon change of switches or upon bus traffic (CAN and LIN) • PCA970x supplied out of cyclically biased transistor regulator ...
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... NXP Semiconductors 8.2.1.3 UJA107x with PCA9703, standby and sleep Fig 9. 1 kΩ Fig 10. UJA107x with PCA9703 with supplied μC (sleep) • UJA107x SBC provides WBIAS pin for cyclic biasing of the inputs • Compatible with UJA107x based ASSPs PCA9703_1 Product data sheet V1 1 kΩ ...
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... NXP Semiconductors 8.2.2 Application examples including switches to battery IN0 IN1 clamp 15 IN15 Fig 11. Clamp 15 (ignition) detection 9. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). − ° ° +125 C, unless otherwise specified. amb Symbol Parameter V supply voltage ...
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... NXP Semiconductors 10. Static characteristics Table 5. Static characteristics Symbol Parameter Supply V supply voltage DD I supply current DD V power-on reset voltage POR General Purpose Inputs (IN0 to IN15) V LOW-level input voltage IL V HIGH-level input voltage IH V hysteresis voltage hys I input current I I HIGH-level input current ...
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... NXP Semiconductors 11. Dynamic characteristics Table 6. Dynamic characteristics Symbol Parameter f maximum input clock frequency max t rise time r t fall time f t pulse width HIGH WH t pulse width LOW WL t SPI enable lead time SPILEAD t SPI enable lag time SPILAG t SDIN set-up time ...
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... NXP Semiconductors Fig 14. AC waveform for t Fig 15. AC waveform for INT timing PCA9703_1 Product data sheet 18 V tolerant SPI 16-bit GPI with maskable INT POR CS SCLK SDOUT MSB out t POR timing POR CS INn STATE 0 INT_EN t v(INT) INT Rev. 01 — 23 February 2010 PCA9703 MSB − ...
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... NXP Semiconductors 12. Test information Fig 16. Test circuitry for enable/disable times, SDOUT (t Fig 17. Test circuitry for switching times, SDOUT (t Fig 18. Test circuitry for switching times, INT R = load resistance load capacitance includes jig and probe capacitance termination resistance should be equal to the output impedance Z T generators ...
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... NXP Semiconductors 13. Package outline TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors HWQFN24: plastic thermal enhanced very very thin quad flat package; no leads; 24 terminals; body 0.75 mm terminal 1 index area terminal 1 24 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max 0.05 0.30 mm 0.8 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 14. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 14.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 14.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 21. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 15. Abbreviations Table 9. Acronym ASSP CAN CDM DUT ECU ESD GPI HBM HS-CAN LIN MM MSB PCB PPAP ...
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... NXP Semiconductors 16. Revision history Table 10. Revision history Document ID Release date PCA9703_1 20100223 PCA9703_1 Product data sheet 18 V tolerant SPI 16-bit GPI with maskable INT Data sheet status Change notice Product data sheet - Rev. 01 — 23 February 2010 PCA9703 Supersedes - © NXP B.V. 2010. All rights reserved. ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 7.1 SPI bus operation . . . . . . . . . . . . . . . . . . . . . . . 6 7.1 chip select . . . . . . . . . . . . . . . . . . . . . . . . 6 7.1.2 SCLK - serial clock input . . . . . . . . . . . . . . . . . 6 7.1.3 SDIN - serial data input ...