BR24L02NUX-WTR Rohm Semiconductor, BR24L02NUX-WTR Datasheet - Page 34

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BR24L02NUX-WTR

Manufacturer Part Number
BR24L02NUX-WTR
Description
IC EEPROM 2KBIT 100KHZ VSON8
Manufacturer
Rohm Semiconductor
Series
-r
Datasheet

Specifications of BR24L02NUX-WTR

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2K (256 x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-UFDFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
BR24L02NUX-WTR
Manufacturer:
ROHM
Quantity:
50 000
Part Number:
BR24L02NUX-WTR
Manufacturer:
ROHM/罗姆
Quantity:
20 000
●I/O peripheral circuit
●A0, A1, A2, WP process
© 2009 ROHM Co., Ltd. All rights reserved.
BR24L□□-W Series,BR24S□□□-W Series
www.rohm.com
○Pull up resistance of SDA terminal
○Maximum value of R
○Minimum value of R
○Pull up resistance of SCL terminal
○Process of device address terminals (A0,A1,A2)
○Process of WP terminal
SDA is NMOS open drain, so requires pull up resistance. As for this resistance value (R
this resistance value from microcontroller V
limited. The smaller the R
The maximum value of R
(1)SDA rise time to be determined by the capacitance (CBUS) of bus line of R
(2)The bus electric potential
Ex.) When Vcc = 3V, I
The minimum value of R
(1)When IC outputs LOW, it should be satisfied that V
(2)V
Ex.) When Vcc= 3V, V
When SCL control is made at CMOS output port, there is no need, but in the case there is timing where SCL becomes
'Hi-Z', add a pull up resistance. As for the pull up resistance, one of several kΩ ~ several ten kΩ is recommended in
consideration of drive performance of output port of microcontroller.
Check whether the set device address coincides with device address input sent from the master side or not, and select
one among plural devices connected to a same bus. Connect this terminal to pull up or pull down, or Vcc or GND. And,
pins(Don't use PIN) not used as device address may be set to any of 'H' , 'L', and 'Hi-Z'.
Types with Don't use PIN
WP terminal is the terminal that prohibits and permits write in hardware manner. In 'H' status, only READ is available and
WRITE of all address is prohibited. In the case of 'L', both are available. In the case of use it as an ROM, it is
recommended to connect it to pull up or Vcc. In the case to use both READ and WRITE, control WP terminal or connect
it to pull down or GND.
And AC timing should be satisfied even when SDA rise time is late.
bus and R
noise margin 0.2Vcc.
Vcc - I
and I
from(2)
from(1),
And
Therefore, the condition (2) is satisfied.
OLMAX
OLMAX
V
R
L
OLMAX
R
R
R
R
=0.4V should secure the input 'L' level (V
PU
PU
PU
PU
PU
V
PU
CC
V
=3mA.
- 0.2Vcc ≧ V
V
R
OL
should sufficiently secure the input 'H' level (V
≦ V
IL
PU
- V
=0.9[V]
=0.4[V]
=0.3×3
300 [kΩ]
OL
PU
PU
3-0.4
0.8×3 - 0.7×3
IL
3×10
867
-0.1 Vcc
0.8V
L
10×10
OL
=10μA, V
0.4V, I
PU
PU
PU
CC
V
I
is determined by the following factors.
IH
, the larger the consumption current at action.
is determined by the following factors.
L
CC
[Ω]
-6
A to be determined by input leak total (I
- V
I
OL
OL
- V
IH
I
IH
=3mA, microcontroller, EEPROM V
OL
OL
= 0.7Vcc
BR24S08F/FJ/FV/FVT/FVM/FVJ/NUX-W
BR24S16F/FJ/FV/FVT/FVM/FVJ/NUX-W
IL
, I
IL
L
) of microcontroller and EEPROM including recommended noise margin 0.1Vcc.
, and V
OLMAX
34/40
OL
-I
OL
=0.4V
characteristics of this IC. If R
IH
) of microcontroller and EEPROM including recommended
Microcontroller
IL
=0.3Vcc
L
) of device connected to bus output of 'H' to SDA
PU
A0, A1
A0, A1, A2
and SDA should be tR or below.
Fig.49 I/O circuit diagram
PU
PU
), select an appropriate value to
is large, action frequency is
Bus line
capacity
CBUS
Technical Note
2009.09 - Rev.D
BR24SXX

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