BR24L02NUX-WTR Rohm Semiconductor, BR24L02NUX-WTR Datasheet - Page 35

• Manufacturer Part Number: BR24L02NUX-WTR
• Description: IC EEPROM 2KBIT 100KHZ VSON8
• Manufacturer: Rohm Semiconductor
• Series: -r

Specifications of BR24L02NUX-WTR

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 2K (256 x 8)
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-UFDFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

●Cautions on microcontroller connection
© 2009 ROHM Co., Ltd. All rights reserved.
BR24L□□-W Series,BR24S□□□-W Series
www.rohm.com
○Rs
○Maximum value of Rs
(1)SDA rise time to be determined by the capacity (CBUS) of bus line of Rpu and SDA shoulder be tR or below.
(2)The bus electric potential
○Maximum value of Rs
sufficiently secure the input 'L' level (V
And AC timing should be satisfied even when SDA rise time is late.
In I
tri state to SDA port, insert a series resistance Rs between the pull up resistance Rpu and the SDA terminal of EEPROM.
This is controls over current that occurs when PMOS of the microcontroller and NMOS of EEPROM are turned ON
simultaneously. Rs also plays the role of protection of SDA terminal against surge. Therefore, even when SDA port is
open drain input/output, Rs can be used.
The maximum value of Rs is determined by following relations.
The minimum value of Rs is determined by over current at bus collision. When over current flows, noises in power source
line, and instantaneous power failure of power source may occur. When allowable over current is defined as I, the
following relation must be satisfied. Determine the allowable current in consideration of impedance of power source line
in set and so forth. Set the over current to EEPROM 10mA or below.
2
C BUS, it is recommended that SDA port is of open drain input/output. However, when to use CMOS input / output of
V
Fig.50 I/O circuit diagram
IL
Microcontre
Microcontroller
'H' output
Microcontroller
Fig.53 I/O circuit diagram
Fig.52 I/O circuit diagram
V
R
CC
○
PU
A to be determined by Rpu and Rs the moment when EEPROM outputs 'L' to SDA bus should
Bus line
capacity CBUS
R
R
Over current Ⅰ
PU
S
R
I
OL
S
R
A
EEPROM
PU
R
S
IL
) of microcontroller including recommended noise margin 0.1Vcc.
EEPROM
EEPROM
'L' output
V
OL
Example）When V
35/40
from(2),
∴
SCL
SDA
(V
'H' output of microcontroller
CC
∴
R
R
R
－V
S
S
PU
V
OL
+R
RS
RS
CC
Example）When V
CC
≦
≦
≦
)×R
S
=3V, V
S
≦
≧
1.67［kΩ］
0.3×3－0.4－0.1×3
V
IL
Fig.51 Input/output collision timing
1.1×3－0.3×3
IL
－V
1.1V
Over current flows to SDA line by 'H' output of
microcontroller and 'L' output of EEPROM.
V
=0.3V
RS
+
CC
I
I
OL
CC
－0.1V
CC
－V
≧
, V
CC
IL
'L' output of EEPROM
ACK
V
OL
=3V, I=10mA
CC
10×10-3
OL
=0.4V, R
+0.1V
3
×
×
Technical Note
2009.09 - Rev.D
CC
≦V
R
PU
20×10
PU
=20kΩ
IL
3