LM41CIMTX/NOPB National Semiconductor, LM41CIMTX/NOPB Datasheet - Page 18

• Manufacturer Part Number: LM41CIMTX/NOPB
• Description: IC HARDWARE MONITOR 14-TSSOP
• Manufacturer: National Semiconductor

Specifications of LM41CIMTX/NOPB

• Applications: Monitors
• Interface: 1-Wire
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 14-TSSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM41CIMTX

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000 101
2.0 Register Set
2.8 DEVICE CONTROL (Addr: 000 101; 05h)
This register responds to a broadcast write command (Device Number 000). Write using broadcast address is ignored by bits
15-2. This register is set to the reset value by a Device Reset.
2.9 TEMPERATURE MEASUREMENT FUNCTION (TYPE - 0001)
This section defines the register structure and operation of a Temperature Measurement function as it applies to the LM41. The
FuncDescriptor value of this function is ‘0001’.
2.9.1 Operation
The Temperature Measurement function as implemented in the LM41 supports 2 temperature zones, the LM41’s internal
temperature (LM41’s junction temperature) and the remote temperature of a thermal diode (stand alone transistors or integrated
in chips). The function measures multiple temperature points and reports the readout to the master. The measurement of all the
enabled temperature sensors is cyclic and continuous.
Sensor Scan The Control register of the function defines which temperature sensors are included in the scan. A sensor is
scanned only if it is enabled by the Sensor Enable bits (EN0 and EN1). The sensors are scanned in an ascending, round-robin
order, based on the sensor number. Disabled sensors are skipped and the next enabled sensor in ascending order is scanned.
Add
Reg
15-6
Bit
Bit
7
0
1
2
3
4
5
Register
Name
Device
Control
Type
Type
R/W Reset (Device Reset). When set to "1" this bit initiates a Device Reset operation ( See Section 2.2). This bit
R/W Shutdown (Shutdown Mode). When set to "1" this bit stops the operation of all functions and places the
R/W LowPwr (Low-Power Mode). When set to "1" this bit slows the operation of all functions and places the
R/W EnF1 (Enable Function 1). When bit is set to "1" this bit Function 1 is enabled for operation. A function may
R/W EnF2 (Enable Function 2). Same as EnF1 for Function 2.
RO
RO
RO
BER (Bus Error) This bit is set when the device either generates, or receives an error indication in the ACK
bit of the transaction (i.e., no-acknowledge). BER is cleared by Device Reset or by reading the Device Status
register.
0: No transaction error occurred.
1: An ACK bit error (no-acknowledge) occurred during the last transaction.
self-clears after the Device Reset operation is completed.
0: Normal device operation. (default)
1: Device Reset
The LM41 does not require a Device Reset command after power.
device in the lowest power consumption mode.
0: Device in Active Mode. (default)
1: Device in Shutdown Mode.
device in a low power consumption mode. In Low-Power Mode, the conversion rate of the LM41 is effected
see Section 2.11 for further details.
0: Device in Active Mode. (default)
1: Device in Low-Power Mode.
Not supported. Will always read "0".
require setup before this bit is set. The function registers can be accessed even when the function is
disabled.
0: Function 1 is disabled. (default)
1: Function is enabled.
Not supported. Will always read "0".
R/
W
R/
W
Val
(Continued)
0h
O
R
P
MSb
Bit
15
0
Bit
14
0
Bit
13
0
Bit
12
0
Reserved
Bit
11
0
18
Description
Description
Bit
10
0
Bit9
0
Bit
8
0
Bit
7
0
Bit
6
0
EnF2 EnF1 Res
Bit
5
Bit
4
Bit
3
Low
Pwr
Bit
2
down
Shut
Bit
1
LSb
Bit
set
Re
0