AN983BLX-BG-T-V1 Infineon Technologies, AN983BLX-BG-T-V1 Datasheet - Page 113

• Manufacturer Part Number: AN983BLX-BG-T-V1
• Description: IC PCI TO ETHERNET LAN 128-FQFP
• Manufacturer: Infineon Technologies

Specifications of AN983BLX-BG-T-V1

• Applications: Ethernet Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 128-BFQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AN983BLXBGTV1; SP000076446

12
Table 33
Revision Date
October, 2000
12.1
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12.2
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Data Sheet
Keep the distance as short as possible between Centaur-P and transformer, as well as transformer and RJ45.
Make crystal device cross to Centaur-P pin x1 x2, and away from the following item:
– Tx+/- Rx+/- differential pairs
– PCB edge
– Transformer
– Any other high frequency items and associated traces
Tx pull high resister needs to close to chip and Rx receiving termination resister and cap needs to close to
transformer.
De-couple cap should be placed as close to chip as possible. The traces should be short.
Use ample dc-coupling and bulk capacitors to minimize noise.
Use X7R ceramic capacitor for better capacitive characteristics overtemperature.
Arrangement Tx and Rx trace
– Tx+/- and Rx+/- trace avoid right angle signal trace, suggest round angle >90°
– Trace width must be wide that should be 2X layout program minimum request or wide than 8 miles.
– Signal trace length between Tx+/- differential pairs should be cross to equal length the total should no long
– Make Tx and Rx trace route at the same signal plane and had better not using bias.
– Every differential pairs as cross as possible, but no less then 8 miles and the space should be almost equal.
– Keep the distance between the Tx and Rx differential pairs large, even separate ground planes underneath
– Away from clock and power trace.
– If possible, with GND plane around.
– If Tx rout trace must cross, you can swap the trace between chip and transformer, and transformer to RJ45,
– The high frequency signal trace width 10~12mil.
– PCI clk signal trace length must equal 2.5inch and other PCI bus signal trace length should less then 1.5 inch
Digital signal should be away from analog signal and power trace. If it can’t be avoided, better be cross over
by 90 degree with analog/
V
Connect Pin 8 and pin 14 together first then use signal via to Gnd.
CC
to 2 cm.same require apply to Rx+/-.
Tx and Rx signal pairs.
too.
trace should short and prefer route in the format of the plane a special for GND.
Layout Guide (Rev. 1.0B)
Layout Guide Revision History
Placement
Trace Routing
Revision
1.0b
V
CC
routing at other plane.
Description
Add Item 2-d to reduce receive CRC error.
113
Layout Guide (Rev. 1.0B)
Rev. 1.81, 2005-12-15
AN983B/BX