P87LPC767BN NXP Semiconductors, P87LPC767BN Datasheet - Page 10

• Manufacturer Part Number: P87LPC767BN
• Description: MCU 8-Bit 87LP 80C51 CISC 4KB EPROM 3.3V/5V 20-Pin PDIP Tube
• Manufacturer: NXP Semiconductors

Specifications of P87LPC767BN

• Package: 20PDIP
• Device Core: 80C51
• Family Name: 87LP
• Maximum Speed: 20 MHz
• Ram Size: 128 Byte
• Program Memory Size: 4 KB
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: EPROM
• Number Of Programmable I/os: 18
• Interface Type: I2C/UART
• On-chip Adc: 4-chx8-bit
• Operating Temperature: 0 to 70 °C
• Number Of Timers: 2

* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
1. Unimplemented bits in SFRs are X (unknown) at all times. Ones should not be written to these bits since they may be used for other
2. I/O port values at reset are determined by the PRHI bit in the UCFG1 configuration byte.
3. The PCON reset value is x x BOF POF–0 0 0 0b. The BOF and POF flags are not affected by reset. The POF flag is set by hardware upon
4. The WDCON reset value is xx11 0000b for a Watchdog reset, xx01 0000b for all other reset causes if the watchdog is enabled, and xx00
Philips Semiconductors
NOTES:
2002 Mar 25
IP1*
IP1H#
KBI#
P0*
P1*
P2*
P0M1#
P0M2#
P1M1#
P1M2#
P2M1#
P2M2#
PCON
PSW*
PT0AD#
SCON*
SBUF
SADDR#
SADEN#
SP
TCON*
TH0
TH1
TL0
TL1
TMOD
WDCON#
WDRST#
Low power, low price, low pin count (20 pin)
microcontroller with 4-kbyte OTP and 8-bit A/D converter
Name
purposes in future derivatives. The reset value shown in the table for these bits is 0.
power up. The BOF flag is set by the occurrence of a brownout reset/interrupt and upon power up.
0000b for all other reset causes if the watchdog is disabled.
Interrupt priority 1
Interrupt priority 1 high byte
Keyboard Interrupt
Port 0
Port 1
Port 2
Port 0 output mode 1
Port 0 output mode 2
Port 1 output mode 1
Port 1 output mode 2
Port 2 output mode 1
Port 2 output mode 2
Power control register
Program status word
Port 0 digital input disable
Serial port control
Serial port data buffer
register
Serial port address register
Serial port address enable
Stack pointer
Timer 0 and 1 control
Timer 0 high byte
Timer 1 high byte
Timer 0 low byte
Timer 1 low byte
Timer 0 and 1 mode
Watchdog control register
Watchdog reset register
Description
Address
SFR
D0h
8Ch
8Dh
F8h
F7h
86h
80h
90h
A0h
84h
85h
91h
92h
A4h
A5h
87h
F6h
98h
99h
A9h
B9h
81h
88h
8Ah
8Bh
89h
A7h
A6h
SMOD1 SMOD0
(P0M1.7)
(P0M2.7)
(P1M1.7)
(P1M2.7)
(P1.7)
GATE
PTIH
SM0
MSB
P2S
TF1
PTI
CY
FF
A7
D7
87
T1
97
9F
8F
–
–
–
(P0M1.6)
(P0M2.6)
(P1M1.6)
(P1M2.6)
CMP1
(P1.6)
SM1
P1S
TR1
C/T
FE
D6
AC
A6
9E
8E
86
96
–
–
–
–
–
7
CMPREF
(P0M1.5)
(P0M2.5)
WDOVF
PC1H
BOF
SM2
PC1
RST
P0S
TF0
M1
FD
A5
D5
9D
8D
85
95
F0
–
–
–
–
Bit Functions and Addresses
(P0M1.4)
(P0M2.4)
(P1M1.4)
(P1M2.4)
ENCLK
WDRUN
CIN1A
PADH
INT1
PAD
POF
REN
RS1
TR0
M0
FC
A4
D4
9C
8C
84
94
–
–
(P0M1.3)
(P0M2.3)
WDCLK
CIN1B
T1OE
GATE
INT0
GF1
RS0
TB8
IE1
FB
A3
D3
9B
8B
83
93
–
–
–
–
–
–
(P0M1.2)
(P0M2.2)
CIN2A
WDS2
PC2H
T0OE
PC2
GF0
RB8
C/T
OV
IT1
D2
FA
82
92
T0
A2
9A
8A
–
–
–
–
(P0M1.1)
(P0M2.1)
(P1M1.1)
(P1M2.1)
(P2M1.1)
(P2M2.1)
CIN2B
WDS1
PKBH
PKB
RxD
IE0
PD
M1
F9
A1
X1
D1
F1
81
91
99
89
TI
P87LPC767
(P0M1.0)
(P0M2.0)
(P1M1.0)
(P1M2.0)
(P2M1.0)
(P2M2.0)
CMP2
WDS0
LSB
PI2H
TxD
PI2
IDL
IT0
M0
F8
A0
X2
D0
80
90
98
RI
88
P
Product data
00h
00h
00h
Note 2
Note 2
Note 2
00h
00H
00h
00h
00h
00h
Note 3
00h
00h
00h
xxh
00h
00h
07h
00h
00h
00h
00h
00h
00h
Note 4
xxh
Reset
Value
1
1
1
1
1