TXC-06412BROG Transwitch Corporation, TXC-06412BROG Datasheet - Page 77
TXC-06412BROG
Manufacturer Part Number
TXC-06412BROG
Description
Manufacturer
Transwitch Corporation
Datasheet
1.TXC-06412BROG.pdf
(226 pages)
Specifications of TXC-06412BROG
Lead Free Status / Rohs Status
Compliant
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7 7 o f 2 2 6
Symbol
a. Only applies if a read access is preceded by a write access.
b. CS may stay low between 2 successive accesses to the same peripheral.
c. Only applies if a read access is followed by a write access.
d. No timing constraint between the rising edges of CS and RD are defined. CS is only latched at
e. Between accesses to different peripherals
t
H3
t
t
t
t
t
SU2
SU3
t
D10
SU1
SU4
t
t
t
t
t
t
t
t
t
t
H2
the beginning of an access.
t
H1
D1
D2
D3
D4
D5
D6
D7
D8
D9
t
t
H
L
b, d
c
e
a
b
20 ns
0.4t
0.4t
-0.9t
0 ns
0 ns
0.7t
0 ns
t
-
0 ns
0 ns
0 ns
4 ns
-
t
TBD
0 ns
0 ns
t
Min
-
-
-
-
-
-
-
20 ns
8 ns
7 ns
-
20 ns
-
TBD
12 ns
12 ns
-
-
-
-
Max
- Timing Characteristics -
CLK clock period
CLK clock low phase pulse width
CLK clock high phase pulse width
Setup time of A to falling edge RD
Setup time of WR to falling edge RD
Setup time of CS to falling edge RD
Setup time of D to active edge RDY
Hold time of A to active edge RDY
Hold time of WR to rising edge RD
Hold time of CS to rising edge RD
Delay from falling edge RD to RDY driving
Delay from falling edge CLK to active edge RDY
Delay from rising edge RD to inactive edge RDY
Delay from RDY going inactive to RDY going in tristate
Delay from rising edge RD to RDY going in tristate
RD inactive pulse width
Response latency
Delay from falling edge RD to D driving
Delay from rising edge RD to D going in tristate
CS inactive pulse width
Description
PRELIMINARY TXC-06412B-MB, Ed. 2
PHAST-12P Device
DATA SHEET
TXC-06412B
June 2005
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