M30622SFP Renesas Electronics America, M30622SFP Datasheet - Page 60

• Manufacturer Part Number: M30622SFP
• Manufacturer: Renesas Electronics America

Specifications of M30622SFP

• Cpu Family: M16C
• Device Core Size: 16/32Bit
• Frequency (max): 24MHz
• Interface Type: I2C/IEBus/UART
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 4KB
• # I/os (max): 87
• Number Of Timers - General Purpose: 11
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ03B0001-0241
Figure 5.5
BCLK
RD
(Separate bus)
WR, WRL, WRH
(Separate bus)
RD
(Multiplexed bus)
WR, WRL, WRH
(Multiplexed bus)
RDY input
BCLK
P0, P1, P2,
P3, P4,
P5_0 to P5_2
(1)
HOLD input
HLDA input
Memory Expansion Mode, Microprocessor Mode
(Common to setting with wait and setting without wait)
(Effective for setting with wait)
NOTES:
Jan 10, 2006
1. These pins are set to high-impedance regardless of the input level of the
BYTE pin, PM06 bit in PM0 register and PM11 bit in PM1 register.
·
·
·
·
Measuring conditions :
V
Input timing voltage : Determined with V
Output timing voltage : Determined with V
Timing Diagram (3)
CC1
=V
t
su(HOLD−BCLK)
CC2
Page 58 of 96
=5V
t
d(BCLK−HLDA)
t
su(RDY−BCLK)
t
h(BCLK−HOLD)
Hi
−
Z
t
d(BCLK−HLDA)
IL
=1.0V, V
OL
=2.5V, V
IH
=4.0V
OH
=2.5V
V
t
h(BCLK−RDY)
CC1
5. Electrical Characteristics
=V
CC2
=5V