M69030 Asiliant Technologies, M69030 Datasheet - Page 232

• Manufacturer Part Number: M69030
• Manufacturer: Asiliant Technologies

Specifications of M69030

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

14-52
XRCE
read/write at I/O address 3D7h with index at I/O address 3D6h set to CEh
shared by both pipelines A and B
Note: Before any value is written to bits other than bit 7 of register, bit 7 of this register should be set to 0
to select the default memory clock.
Note: All three of the registers used in specifying the loop parameters for the memory clock (XRCC -
XRCE) must be written, and in order from XRCC to XRCE, before the hardware will update the synthesizer’s
settings. This is a form of double-buffering that is intended to prevent fluctuations in the synthesizer’s output
as new values are being written to these registers.
7
6-4
3-0
`efmp
A
&
B
Clock Select
Memory

Memory Clock Select
Post Divisor Select
Reserved
69030 Databook
7
Memory Clock Divisor Select Register
0: The memory clock output is set to a preset frequency of 25.17540.00MHz. This is the
default after reset.
1: The memory clock output is controlled by the loop parameters given to the memory clock
synthesizer using a group of three registers (XRCC-XRCE) which includes this one.
These three bits select a value that specifies the post divisor, one of the loop parameters
used in controlling the frequency of the output of the synthesizer used to generate the
memory clock. The manner in which these bits are used to choose this value is shown in
the table below:
A series of calculations are used to derive this value and the values for the other loop
parameters given a desired output frequency and a series of constraints placed on different
components within the synthesizer used to generate the memory clock. See the appendix
on clock generation for a detailed description of the process used to derive the loop
parameter values.
These bits always return the value of 0 when read.
6 5 4
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
6
Bits
Post Divisor Select
5
Post Divisor
Reserved
Reserved
Extension Registers
16
32
1
2
4
8
4
3
2
Reserved
Revision 1.3 11/24/99
1
0