M69030 Asiliant Technologies, M69030 Datasheet - Page 335

• Manufacturer Part Number: M69030
• Manufacturer: Asiliant Technologies

Specifications of M69030

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

ER01
doubleword-writable, byte/word/doubleword-readable at memory offsets 0x400604 and 0xC00604
shared by both pipelines A and B
31
30
29-19
18
`efmp
A
&
B
A
&
B
BBLT
Rsvd
Idle
(0)
(0)
31
15

BitBLT Engine Idle Interrupt Pending
BitBLT Engine Empty Interrupt Pending
Reserved
Pipeline B Vertical Blanking Period Interrupt Pending
69030 Databook
Queue
Pipe A
V Blnk
BBLT
(0)
(0)
30
14
Central Interrupt Pending/Acknowledge Register
0: Since this bit was last cleared, no interrupt has been pending as a result of the BitBLT
engine becoming idle after performing a BitBLT operation.
1: An interrupt is pending as a result of the BitBLT engine becoming idle after performing
a BitBLT operation. Writing the value of 1 to this bit will clear it to 0 (writing the value of 0
to this bit has no effect and will be ignored).
0: Since this bit was last cleared, no interrupt has been pending as a result of the BitBLT
engine and its pipe becoming empty, both blitter engines becoming idle and the command
parser processing a flush command.
1: An interrupt is pending as a result of the BitBLT engine and its pipe becoming empty,
both blitter engines becoming idle and the command parser processing a flush command.
Writing the value of 1 to this bit will clear it to 0 (writing the value of 0 to this bit has no effect
and will be ignored).
These bits always return the value of 0 when read.
0: Since this bit was last cleared, no interrupt has been pending as a result of the drawing
of the last scan line within the active display area on pipeline B.
1: An interrupt is pending as a result of the drawing of the last scan line within the active
display area on pipeline B. Writing the value of 1 to this bit will clear it to 0 (writing the value
of 0 to this bit has no effect and will be ignored).
29
13
28
12
Memory-Mapped Wide Extension Registers
27
11
(00:0000:0)
Reserved
26
10
(00:0000:0000:0)
25
29
Reserved
24
8
23
7
VSync
V Cap
(0)
22
6
21
5
20
4
Reserved
(00:0000)
19
3
Revision 1.3 11/24/99
Pipe B
V Blnk
(0)
18
2
Reserved
17
1
(00)
18-3
16
0