GS8342T36AE-250 GSI TECHNOLOGY, GS8342T36AE-250 Datasheet - Page 11

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GS8342T36AE-250

Manufacturer Part Number
GS8342T36AE-250
Description
Manufacturer
GSI TECHNOLOGY
Datasheet

Specifications of GS8342T36AE-250

Density
36Mb
Access Time (max)
0.45ns
Sync/async
Synchronous
Architecture
DDR
Clock Freq (max)
250MHz
Operating Supply Voltage (typ)
1.8V
Address Bus
20b
Package Type
FBGA
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
650mA
Operating Supply Voltage (min)
1.7V
Operating Supply Voltage (max)
1.9V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
165
Word Size
36b
Number Of Words
1M
Lead Free Status / Rohs Status
Not Compliant
GS8342T08/09/18/36AE-333/300/250/200/167
FLXDrive-II Output Driver Impedance Control
HSTL I/O SigmaQuad-II SRAMs are supplied with programmable impedance output drivers. The ZQ pin must be connected to
V
via an external resistor, RQ, to allow the SRAM to monitor and adjust its output driver impedance. The value of RQ must be
SS
5X the value of the desired RAM output impedance. The allowable range of RQ to guarantee impedance matching continuously is
between 175Ω and 350Ω. Periodic readjustment of the output driver impedance is necessary as the impedance is affected by drifts
in supply voltage and temperature. The SRAM’s output impedance circuitry compensates for drifts in supply voltage and
temperature. A clock cycle counter periodically triggers an impedance evaluation, resets and counts again. Each impedance
evaluation may move the output driver impedance level one step at a time towards the optimum level. The output driver is
implemented with discrete binary weighted impedance steps.
Rev: 1.05 12/2007
11/37
© 2006, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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