CYNSE70256-66BHC Cypress Semiconductor Corp, CYNSE70256-66BHC Datasheet - Page 14

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CYNSE70256-66BHC

Manufacturer Part Number
CYNSE70256-66BHC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CYNSE70256-66BHC

Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Package Type
BGA
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
CYNSE70256-66BHC
Manufacturer:
TI
Quantity:
8
Part Number:
CYNSE70256-66BHC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
7.2
The device contains two banks of 32 72-bit GMRs (sixteen pairs) dynamically selected in every Search operation to select the
Search subfield. The addressing of these registers is explained in Figure 7-2. The 4-bit GMR index supplied on the command
bus can apply sixteen pairs of global masks during Search and Write operations, as shown below.
Each mask bit in the GMRs is used during Search and Write operations. In Search operations, setting the mask bit to 1 enables
compares; setting the mask bit to 0 disables compares at the corresponding bit position (forced match). In Write operations to
the data or mask array, setting the mask bit to 1 enables Writes; setting the mask bit to 0 disables Writes at the corresponding
bit position.
7.3
The device contains two banks of eight search successful registers (SSRs) to hold the index of the location at which a successful
search occurred. The format of each register is described in Table 7-2. The Search command specifies which SSR stores the
index of a specific Search command in cycle B of the Search instruction. Subsequently, the host ASIC can use this register to
access that data array, mask array, or external SRAM using the index as part of the indirect access address (see Table 10-3 and
Table 10-6).
The device with a valid bit set performs a Read or Write operation. All other devices suppress the operation.
Note:
Document #: 38-02035 Rev. *E
6.
In 72-bit Search and Write operations, the host ASIC must program both the even and odd mask registers with the same values for each of the banks.
Mask Registers
Search Successful Registers (SSR[0:7])
Figure 7-1. Comparand Register Selection during Search and Learn Instructions
Search and Write Command Global Mask Selection
Figure 7-2. Addressing the GMR Array
Address
index
Index 143
10
12
13
14
15
15
11
0
1
0
1
2
3
4
5
6
7
8
9
143
72
30
0
2
4
6
10
12
14
16
18
20
22
24
26
28
30
72
0
2
4
6
8
72
31
1
3
5
7
72
13
15
17
19
21
23
25
27
29
31
0
11
1
3
5
7
9
0
[6]
CYNSE70256
Page 14 of 109

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