CYNSE70256-66BHC Cypress Semiconductor Corp, CYNSE70256-66BHC Datasheet - Page 30

• Manufacturer Part Number: CYNSE70256-66BHC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70256-66BHC

• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

Note
the table must be programmed with LRAM = 1 and LDEV = 1 (device number 14 in this case).
The timing diagrams referred to in this paragraph reference the Hit/Miss assumptions defined in Table 10-13. For the purpose of
illustrating the timings, it is further assumed that the there is only one device with a matching entry in each of the blocks. Figure 10-
12 shows the timing diagram for a Search command in the 72-bit-configured table of fifteen devices for each of the four devices
in block number 0. Figure 10-13 shows the timing diagram for a Search command in the 72-bit-configured table of fifteen devices
for the all the devices in block number 1 (above the winning device in that block). Figure 10-14 shows the timing diagram for the
globally winning device (defined as the final winner within its own and all blocks) in block number 1. Figure 10-15 shows the timing
diagram for all the devices below the globally winning device in block number 1. Figure 10-16, Figure 10-17, and Figure 10-18
show the timing diagrams of the devices above the globally winning device, the globally winning device, and the devices below
the globally winning device, respectively, for block number 2. Figure 10-19, Figure 10-20, Figure 10-21, and Figure 10-22 show
the timing diagrams of the devices above globally winning device, the globally winning device, and the devices below the globally
winning device except the last device (device 14), respectively, for block number 3.
The 72-bit Search operation is pipelined and executes as follows. Four cycles from the Search command, each of the devices
knows the outcome internal to it for that operation. In the fifth cycle after the Search command, the devices in a block arbitrate
for a winner among them (a “block” being defined as less than or equal to four devices resolving the winner within them using
the LHI[6:0] and LHO[1:0] signalling mechanism). In the sixth cycle after the Search command, the blocks (of devices) resolve
the winning block through the BHI[2:0] and BHO[2:0] signalling mechanism. The winning device within the winning block is the
global winning device for a Search operation.
Table 10-13. Hit/Miss Assumptions
Document #: 38-02035 Rev. *E
• First thirty devices (devices 0–13, both banks): CFG = 0000000000000000, TLSZ = 10, HLAT = 001, LRAM = 0, and LDEV = 0.
• First thirty devices (device 14, Bank 0): CFG = 0000000000000000, TLSZ = 10, HLAT = 001, LRAM = 0, and LDEV = 0.
• Thirty-first device (device 14, Bank 1): CFG = 0000000000000000, TLSZ = 10, HLAT = 001, LRAM = 1, and LDEV = 1.
. All fifteen devices must be programmed with the same values for TLSZ and HLAT. Only the last bank of the last device in
Search Number
Block 0
Block 1
Block 2
Block 3
SSF, SSV
DQ[71:0]
CMD[10:0], CMDV
Figure 10-10. Hardware Diagram for a Table with Fifteen Devices
Miss
Miss
Miss
Hit
1
BHO[2]
BHO[2]
BHI[2]
BHO[2]
BHO[2]
Block of 8 CYNSE70256s Block 0
Block of 8 CYNSE70256s Block 2
Block of 7 CYNSE70256s Block 3
Block of 8 CYNSE70256s Block 1
BHI[2]
BHI[2]
BHI[2]
(Devices 12–14)
(Devices 8–11)
(Devices0–3)
(Devices 4–7)
Miss
Miss
Hit
Hit
2
BHO[1]
BHO[1]
BHI[1]
BHO[1]
BHO[1]
BHI[1]
BHI[1]
BHI[1]
BHO[0]
BHO[0]
BHO[0]
BHO[0]
BHI[0]
BHI[0]
BHI[0]
BHI[0]
Miss
Miss
Hit
Hit
3
GND
GND
GND
SRAM
CYNSE70256
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Miss
Miss
Miss
Miss
4