CYNSE70256-66BHC Cypress Semiconductor Corp, CYNSE70256-66BHC Datasheet - Page 67

• Manufacturer Part Number: CYNSE70256-66BHC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70256-66BHC

• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

The timing diagrams referred to in this paragraph reference the Hit/Miss assumptions defined in Table 10-25. For the purpose of
illustrating the timings, it is further assumed that there is only one device with the matching entry in each block. Figure 10-50
shows the timing diagram for a Search command in the 288-bit-configured table of fifteen devices for each of the four devices in
block number 0. Figure 10-51 shows the timing diagram for a Search command in the 288-bit-configured table of fifteen devices
for all devices above the winning device in block number 1. Figure 10-52 shows the timing diagram for the globally winning device
(the final winner within its own and all blocks) in block number 1. Figure 10-53 shows the timing diagram for the devices below
the globally winning device in block number 1. Figure 10-54, Figure 10-55, and Figure 10-56, respectively, show the timing
diagrams of the devices above the globally winning device, the globally winning device, and the devices below the globally winning
device in block number 2. Figure 10-57, Figure 10-58, Figure 10-59, and Figure 10-60, respectively, show the timing diagrams
of the devices above the globally winning device, the globally winning device, the devices below the globally winning device
(except device 14), and the last device (device 14) in block number 3.
The 288-bit Search operation is pipelined and executes as follows. Four cycles from the last cycle of the Search command, each
of the devices knows the outcome internal to it for that operation. In the fifth cycle from the Search command, the devices in
a block (less than or equal to four devices resolving the winner among them using LHI[6:0] and LHO[1:0] signalling mechanisms)
arbitrate for a winner. In the sixth cycle after the Search command, the blocks of devices resolve the winning block through
BHI[2:0] and BHO[2:0] signalling mechanisms. The winning device within the winning block is the global winning device for the
Search operation.
Table 10-25. Hit/Miss Assumptions
Document #: 38-02035 Rev. *E
Search Number
Block 0
Block 1
Block 2
Block 3
SSF, SSV
DQ[71:0]
CMD[10:0], CMDV
Figure 10-48. Hardware Diagram for a Table with Fifteen Devices
Miss
Miss
Miss
Hit
BHO[2]
1
BHO[2]
BHI[2]
BHO[2]
BHO[2]
Block of 8 CYNSE70256s block 0
Block of 7 CYNSE70256s block 3
Block of 8 CYNSE70256s block 2
BHI[2]
Block of 8 CYNSE70256s block 1
BHI[2]
BHI[2]
(devices 12–14)
(devices 8–11)
(devices 0–3)
(devices 4–7)
BHO[1]
BHO[1]
BHI[1]
BHO[1]
BHO[1]
BHI[1]
BHI[1]
BHI[1]
Miss
Miss
Hit
Hit
2
BHO[0]
BHO[0]
BHO[0]
BHO[0]
BHI[0] GND
BHI[0]
BHI[0]
BHI[0] GND
GND
SRAM
CYNSE70256
Miss
Miss
Hit
Hit
3
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