LM90CIMMX National Semiconductor, LM90CIMMX Datasheet
LM90CIMMX
Specifications of LM90CIMMX
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LM90CIMMX Summary of contents
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... LM90 Simplified Block Diagram Pentium ™ trademark of Intel Corporation. © 2002 National Semiconductor Corporation n On-board local temperature sensing n 10 bit plus sign remote diode temperature data format, 0.125 ˚C resolution n Diode fault detection circuitry n T_CRIT_A output useful for system shutdown (open diode does not activate T_CRIT_A) n ALERT output supports SMBus 2 ...
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... Connection Diagram Ordering Information LM90CIMM LM90CIMMX Pin Descriptions Label Pin # D− 3 T_CRIT_A 4 GND 5 ALERT 6 SMBData 7 SMBCLK 8 www.national.com MSOP-8 20033702 TOP VIEW Package NS Package Marking Number T11C MUA08A (MSOP-8) T11C MUA08A (MSOP-8) Function Positive Supply Voltage DC Voltage from 3 3.6 V Input Diode Current Source To Diode Anode ...
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Typical Application 3 20033703 www.national.com ...
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... Remote Diode Junction D Temperature) Remote Diode Measurement Resolution Local Diode Measurement Resolution Conversion Time of All Temperatures at the Fastest Setting Quiescent Current (Note 9) D− Source Voltage Diode Source Current ALERT and T_CRIT_A Output Saturation Voltage ...
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... Temperature-to-Digital Converter Characteristics Unless otherwise noted, these specifications apply for all other limits MIN A MAX A Parameter Local and Remote T_CRIT Default Temperature Setting Logic Electrical Characteristics DIGITAL DC CHARACTERISTICS Unless otherwise noted, these specifications apply for all other limits =+25˚C, unless otherwise noted. ...
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... Parasitic components and or ESD protection circuitry are shown in the figure below for the LM90’s pins. The nominal breakdown voltage 6.5 V. Care should be taken not to forward bias the parasitic diode, D1, present on pins: D+, D−. Doing so by more than 50 mV may corrupt a temperature measurements. ...
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... LM90 and the thermal resistance. See (Note 5) for the thermal resistance to be used in the self-heating calculation. Note 9: Quiescent current will not increase substantially with an SMBus. Note 10: This specification is provided only to indicate how often temperature data is updated. The LM90 can be read at any time without regard to conversion state (and will yield last conversion result). ...
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... Master resets the ALERT mask (D7 in the Configuration register). www.national.com (Continued) FIGURE 4. ALERT Output as an Interrupt Temperature 1.2.3 ALERT Output as an SMBus ALERT When the ALERT output is connected to one or more ALERT outputs of other SMBus compatible devices and to a master, an SMBus alert line is created. Under this implementation, the LM90’ ...
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... LM90 remains in these states until after the first conversion. 1. Command Register set to 00h 2. Local Temperature set to 0˚C 3. Remote Diode Temperature set to 0˚C until the end of the first conversion. 4. Status Register set to 00h. 5. Configuration register set to 00h; ALERT enabled, Re- ...
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... If the location latched in the Command Register is cor- rect (most of the time it is expected that the Command Register will point to one of the Read Temperature Reg- isters because that will be the data most frequently read from the LM90), then the read can simply consist of an address byte, followed by retrieving the data byte ...
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... SMBus start condition at any point during the communi- cation. After the start the LM90 will expect an SMBus Address address byte. 1.11 DIGITAL FILTER In order to suppress erroneous remote temperature readings ). TIMEOUT due to noise, the LM90 incorporates a user-configured digital filter. The filter is accessed in the FILTER and ALERT CON- FIGURE REGISTER at BFh ...
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Functional Description a)Step Response FIGURE 9. Digital Filter Response in a Pentium 4 processor System. The filter on and off curves were purposely www.national.com Level 2 sets maximum filtering. ...
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... Fault Queue In order to suppress erroneous ALERT or T_CRIT triggering the LM90 incorporates a Fault Queue. The Fault Queue acts to insure a remote temperature measurement is genuinely beyond a HIGH, LOW or T_CRIT setpoint by not triggering until three consecutive out of limit measurements have been made, see Figure 10 . The fault queue defaults off upon power-up and may be activated by setting bit D0 in the Configuration register (09h) to “ ...
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... For RTLB D7–D5: Temperature Data. LSB = 0.125˚C. Two’s complement format. The maximum value available from the Local Temperature register is 127; the minimum value available from the Local Temperature register is -128. The maximum value available from the Remote Temperature register is 127.875; the minimum value available from the Remote Temperature registers is −128.875. ...
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... LOCAL and REMOTE LOW SETPOINT REGISTERS (LLS, RLSHB, and RLSLB) (Read Address 06h, 08h, /Write Address 0Ch, 0Eh): BIT Value SIGN For LLS and RLSHB: HIGH setpoint temperature data. Power up default is LHIGH = RHIGH = 0˚C. 1LSB = 1˚C. Two’s complement format. (Read/Write Address 14h): BIT Value For RLSLB: Remote HIGH Setpoint Low Byte temperature data. Power up default is 0˚ ...
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... LM90 REGISTERS For RTOHB: Remote Temperature Offset High Byte. Power up default is LHIGH = RHIGH = 0˚C. 1LSB = 1˚C. Two’s complement format. (Read/Write Address 12h): BIT Value For RTOLB: Remote Temperature Offset High Byte. Power up default is 0˚C. 1LSB = 0.125˚C. Two’s complement format. ...
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... Compensating for Diode Non-Ideality In order to compensate for the errors introduced by non-ideality, the temperature sensor is calibrated for a par- ticular processor. National Semiconductor temperature sen- sors are always calibrated to the typical non-ideality of a given processor type. The LM90 is calibrated for the non-ideality of a mobile Pentium III processor, 1.008. When ...
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... Errors Induced when Temperature Sensor is Not 20033737 FIGURE 14 This offset has resulted in an error of less than 0.05˚C for the temperatures measured in the critical range between 60 to 100˚C. This method yeilds a first order correction factor. Please send an email to hardware.monitor.team requesting further information on our recommended setting of the offset register for different processor types ...
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... Leakage current between D+ and GND should be kept to a minimum. One nano-ampere of leakage can cause as much as 1˚C of error in the diode temperature read- ing. Keeping the printed circuit board as clean as pos- sible will minimize leakage current. Noise coupling into the digital lines greater than 400mVp-p ...
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... National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. inches (millimeters) JEDEC Registration Number MO-187 Order Number LM90CIMM or LM90CIMMX NS Package Number MUA08A 2. A critical component is any component of a life ...